參數(shù)資料
型號(hào)： ADAU1966WBSTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 1/52頁(yè)
文件大?。?/td> 0K
描述： IC DAC 24BIT SPI/I2C 192K 80LQFP
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 24
數(shù)據(jù)接口： I²C，串行，SPI?
轉(zhuǎn)換器數(shù)目： 16
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 511mW
工作溫度： -40°C ~ 105°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-LQFP（14x14）
包裝： 托盤(pán)
輸出數(shù)目和類(lèi)型： 16 電壓，單極
采樣率（每秒）： *
16-Channel High Performance
Differential Output, 192 kHz, 24-Bit DAC
Data Sheet
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2011–2013 Analog Devices, Inc. All rights reserved.
FEATURES
118 dB DAC dynamic range and SNR
98 dB THD + N
Differential voltage DAC output
2.5 V digital, 5 V analog and 3.3 V or 5 V I/O supplies
521 mW total (32.6 mW/channel) quiescent power
PLL generated or direct MCLK master clock
Low EMI design
Linear regulator driver to generate digital supply
Supports 24-bit and 32 kHz to 192 kHz sample rates
Low propagation 192 kHz sample rate mode
Log volume control with autoramp function
Temperature sensor with digital readout ±3°C accuracy
SPI and I2C controllable for flexibility
Software-controllable clickless mute
Software power-down
Right-justified, left-justified, I2S, and TDM modes
Master and slave modes with up to 16-channel input/output
80-lead LQFP package
Qualified for automotive applications
APPLICATIONS
Automotive audio systems
Home theater systems
Digital audio effects processors
GENERAL DESCRIPTION
The ADAU1966 is a high performance, single-chip DAC that
provides 16 digital-to-analog converters (DACs) with differen-
tial output using the Analog Devices, Inc., patented multibit
sigma-delta (Σ-Δ) architecture. An SPI/I2C port is included,
allowing a microcontroller to adjust volume and many other
parameters. The ADAU1966 operates from 2.5 V digital, 5 V
analog and 3.3 V or 5 V input/output supplies. A linear regulator
is included to generate the digital supply voltage from the analog
supply voltage. The ADAU1966 is available in an 80-lead LQFP
package.
The ADAU1966 is designed for low EMI. This consideration is
apparent in both the system and circuit design architectures.
By using the on-board PLL to derive the internal master clock
from an external LRCLK, the ADAU1966 can eliminate the
need for a separate high frequency master clock and can be
used with or without a bit clock. The DACs are designed using
the latest Analog Devices continuous time architectures to
further minimize EMI. By using 2.5 V digital supplies, power
consumption is minimized, and the digital waveforms are a
smaller amplitude, further reducing emissions.
FUNCTIONAL BLOCK DIAGRAM
SERIAL DATA PORT
DIGITAL AUDIO
INPUT
PRECISION
VOLTAGE
REFERENCE
INTERNAL
TEMP
SENSOR
TIMING MANAGEMENT
AND CONTROL
(CLOCK AND PLL)
SPI/I2C
CONTROL PORT
CONTROL DATA
INPUT/OUTPUT
ADAU1966
DIFFERENTIAL
ANALOG
AUDIO
OUTPUTS
DIFFERENTIAL
ANALOG
AUDIO
OUTPUTS
DAC
DIGITAL
FILTER
AND
VOLUME
CONTROL
DIGITAL
FILTER
AND
VOLUME
CONTROL
SDATA
IN
SDATA
IN
CLOCKS
09434-
001
Figure 1.
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