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參數資料
| 型號： | AD9948KCPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 25/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCD SIGNAL PROCESSOR 40-LFCSP |
| 標準包裝： | 2,500 |
| 類型： | CCD 信號處理器，10 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 40-LFCSP |
| 包裝： | 帶卷 (TR) |
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REV. 0
–6–
AD9948
EQUIVALENT CIRCUITS
R
AVDD
AVSS
Circuit 1. CCDIN (Pin 27)
AVDD
AVSS
330
CLI
25k
1.4V
Circuit 2. CLI (Pin 25)
DVSS
DRVDD
DVSS
DRVSS
DATA
THREE-
STATE
DOUT
Circuit 3. Data Outputs D0–D9 (Pins 2–4, 7–13)
DVDD
DVSS
330
Circuit 4. Digital Inputs (Pins 31–35, 38)
HVDD or RGVDD
HVSS or RGVSS
DATA
ENABLE
OUTPUT
Circuit 5. H1–H4 and RG (Pins 14, 15, 18, 19, 21)
TERMINOLOGY
Differential Nonlinearity (DNL)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Thus every
code must have a finite width. No missing codes guaranteed to
10-bit resolution indicates that all 1024 codes, respectively,
must be present over all operating conditions.
Peak Nonlinearity
Peak nonlinearity, a full signal chain specification, refers to the
peak deviation of the output of the AD9948 from a true straight
line. The point used as zero scale occurs 0.5 LSB before the
first code transition. Positive full scale is defined as a level 1 LSB
and 0.5 LSB beyond the last code transition. The deviation is
measured from the middle of each particular output code to the
true straight line. The error is then expressed as a percentage of
the 2 V ADC full-scale signal. The input signal is always appro-
priately gained up to fill the ADC’s full-scale range.
Total Output Noise
The rms output noise is measured using histogram techniques.
The standard deviation of the ADC output codes is calculated in
LSB, and represents the rms noise level of the total signal chain
at the specified gain setting. The output noise can be converted
to an equivalent voltage, using the relationship
12
n
LSB
(ADC full scale/
codes)
=
where n is the bit resolution of the ADC. For the AD9948,
1LSB is approximately 1.95 mV.
Power Supply Rejection (PSR)
The PSR is measured with a step change applied to the supply
pins. The PSR specification is calculated from the change in the
data outputs for a given step change in the supply voltage.
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| AD9949AKCPZ | 功能描述:IC CCD SIGNAL PROCESSOR 40-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數字 輸出類型:數字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
| AD9949AKCPZRL | 功能描述:IC CCD SIGNAL PROCESSOR 40-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數字 輸出類型:數字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
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