參數(shù)資料
型號： AD9898
廠商： Analog Devices, Inc.
英文描述： CCD Signal Processor with Precision Timing⑩ Generator
中文描述： CCD信號處理器精確定時⑩發(fā)生器
文件頁數(shù)： 15/52頁
文件大?。?/td> 557K
代理商： AD9898
REV. 0
AD9898
–15–
Table IV. Mode_B Register Map (Addr 0x16)
Bit
Width
Default
(Decimal) Register Name
Register
Content
Register Description
Mode_Reg(0) (31:24)
8
24
NA
NA
Mode_B_Addr
Mode_B_Number_N
Mode_B Address Is (Addr 0x16)
Number N Register Writes (0x000000 = Write All Registers)
(23:0)
Mode_Reg(1) (31:21)
11
12
1
1
7
262
1139
1
0
0
VDLEN
HDLASTLEN
*
VSGSEL0
VSGSEL1
VSGACTLINE
VD Counter Value
Number of Pixels in Last Line (Gray Code Number)
VSG1 Sequence Selector (See Table XXIII)
VSG2 Sequence Selector (See Table XXIII)
VSG Active Line
(20:9)
8
7
(6:0)
Mode_Reg(2) 31
1
3
3
3
3
3
1
1
1
1
1
8
3
0
0
0
0
0
0
1
0
0
0
0
0
SUBCKSEL
VTPSEQPTR0
VTPSEQPTR1
VTPSEQPTR2
VTPSEQPTR3
VTPSEQPTR4
CLPEN0
CLPEN1
CLPEN2
CLPEN3
CLPEN4
SCP1
SCP2
Select One of Two SUBCK Patterns
Vertical Transfer Sequence Region No. 0
Vertical Transfer Sequence Region No. 1
Vertical Transfer Sequence Region No. 2
Vertical Transfer Sequence Region No. 3
Vertical Transfer Sequence Region No. 4
CLPOB Output Control No. 1
CLPOB Output Control No. 2
CLPOB Output Control No. 3
CLPOB Output Control No. 4
CLPOB Output Control No. 5
Sequence Change Position No. 1
(30:28)
(27:25)
(24:22)
(21:19)
(18:16)
15
14
13
12
11
(10:3)
(2:0)
Mode_Reg(3) (31:27)
5
8
8
2
2
2
2
3
0
0
0
0
0
0
0
3
SCP2
SCP3
SCP4
VTPSEL0
VTPSEL1
VTPSEL2
VTPSEL3
VTPREP0
Sequence Change Position No. 2
Sequence Change Position No. 3
Sequence Change Position No. 4
Vertical Pattern Selection 0
Vertical Pattern Selection 1
Vertical Pattern Selection 2
Vertical Pattern Selection 3
Number of VTP0 Pulse Repetitions for Pattern0
(26:19)
(18:11)
(10:9)
(8:7)
(6:5)
(4:3)
(2:0)
Mode_Reg(4) (31:29)
3
3
3
11
11
1
0
0
0
0
0
VTPREP1
VTPREP2
VTPREP3
SVREP0
SVREP3
Number of VTP1 Pulse Repetitions for Pattern1
Number of VTP2 Pulse Repetitions for Pattern2
Number of VTP0 Pulse Repetitions for Pattern3
Vertical Sweep Repetition Number for CCD Region0
Vertical Sweep Repetition Number for CCD Region3
Unused
(28:26)
(25:23)
(22:12)
(11:1)
0
Mode_Reg(5) (31:19)
13
13
6
988
1138
V1SPAT_TOG1
V1SPAT_TOG2
V2SPAT_TOG1
Polarity Change Position Start for V1 SPAT
Polarity Change Position End for V1 SPAT
(18:6)
(5:0)
Mode_Reg(6) (31:25)
7
13
12
1078
1168
V2SPAT_TOG1
V2SPAT_TOG2
V3SPAT_TOG1
Polarity Change Position Start for V2 SPAT
Polarity Change Position End for V2 SPAT
(24:12)
(11:0)
Mode_Reg(7) 31
1
13
13
5
958
1138
988
V3SPAT_TOG1
V3SPAT_TOG2
V4SPAT_TOG1
V4SPAT_TOG2
Polarity Change Position Start for V3 SPAT
Polarity Change Position End for V3 SPAT
Polarity Change Position Start for V4 SPAT
(30:18)
(17:5)
(4:0)
Mode_Reg(8) (31:24)
8
13
2
9
1228
1392
3
V4SPAT_TOG2
SECONDVPOS
VPATSECOND
Polarity Change Position End for V4 SPAT
Second V Pattern Output Position
Selected Second V Pattern Group for VSG Active Line
Unused
(23:11)
(10:9)
(8:0)
*
Register value must be a gray code number. (See Gray Code Registers section.)
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