- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16426 > AD9880/PCBZ (Analog Devices Inc)KIT EVALUATION AD9880 PDF資料下載
參數(shù)資料
| 型號： | AD9880/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 37/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT EVALUATION AD9880 |
| 標準包裝： | 1 |
| 系列： | Advantiv® |
| 主要目的： | 視頻，視頻處理 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD9880 |
| 主要屬性： | 模擬和 HDMI/DVI 雙路顯示器端口 |
| 次要屬性： | 自動偏移，色域轉(zhuǎn)換器，RGB 和 YCbCr 輸出格式 |
| 已供物品： | 板 |
| 相關產(chǎn)品： | AD9880KSTZ-150-ND - IC INTERFACE/HDMI 150MHZ 100LQFP AD9880KSTZ-100-ND - IC INTERFACE/HDMI 100MHZ 100LQFP |
| 其它名稱： | Q5281026 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁當前第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
AD9880
Rev. 0 | Page 42 of 64
0x1B
5
Blue Clamp Select
This bit selects whether the blue channel is clamped to
ground or midscale. Ground clamping is used for blue
in RGB applications and midscale clamping is used in
YPrPb (YUV) applications.
Table 30. Blue Clamp
Select
Result
0
Channel clamped to ground during clamping period
1
Channel clamped to midscale during clamping period
The power-up default is 0.
0x1B
4
Clamp During Coast
This bit permits clamping to be disabled during
Coast. The reason for this is video signals are
generally not at a known backporch or midscale
position during Coast.
Table 31. Clamp During Coast
Select
Result
0
Clamping during Coast is disabled
1
Clamping during Coast is enabled
The power-up default is 0.
0x1B
3
Clamp Disable
Table 32. Clamp Disable
Select
Result
0
Internal clamp enabled
1
Internal clamp disabled
The power-up default is 0.
0x1B
2-1
Programmable Bandwidth
Table 33. Bandwidth
Select
Result
x0
Low bandwidth
x1
High bandwidth
The power-up default is 1.
0x1B
0
Hold Auto Offset
Table 34. Auto Offset Hold
Select
Result
0
Normal auto offset operation
1
Hold current offset value
The power-up default is 0.
0x1C
7
Auto Offset Enable
0 = manual offset
1 = auto offset using offset as target code. The power-
up default is 0.
0x1C
6-5
Auto Offset Update Mode
00 = every clamp
01 = every 16 clamps
10 = every 64 clamps
11 = every Vsync
The power-up default setting is 10.
0x1C
4-3
Difference Shift Amount
00 = 100% of difference used to calculate new offset
01 = 50%
10 = 25%
11 = 12.5%
The power-up default is 01.
0x1C
2
Auto Jump Enable
0 = normal operation
1 = if the code >15 codes off, the offset is jumped to
the predicted offset necessary to fix the >15 code mis-
match. The power-up default is 1.
0x1C
1
Post Filter Enable
The post filter reduces the update rate by 1/6 and
requires that all six updates recommend a change
before changing the offset. This prevents unwanted
offset changes.
0 = disable post filer
1 = enable post filter
The power-up default is 1.
0x1C
0
Toggle Filter Enable
The toggle filter looks for the offset to toggle back and
forth and holds it if triggered. This is to prevent
toggling in case of missing codes in the PGA.
1 = toggle filter on, 0 = toggle filter off.
The power-up default is 0.
0x1D
7-0
Slew Limit
Limits the amount the offset can change by in a single
update. The power-up default is 0x08.
0x1E
7-0
Sync Filter Lock Threshold
This 8-bit register is programmed to set the number
of valid Hsyncs needed to lock the sync filter. This
ensures that a consistent, stable Hsync is present
before attempting to filter. The power-up default
setting is 32d.
0x1F
7-0
Sync Filter Unlock Threshold
This 8-bit register is programmed to set the number of
missing or invalid Hsyncs needed to unlock the sync
filter. This disables the filter operation when there is
no longer a stable Hsync signal. The power-up default
setting is 50d.
相關PDF資料 |
PDF描述 |
|---|---|
| S01-02-R | SOLDER SLEEVE IMMERS RESIS .650" |
| ILSB1206ER180K | INDUCTOR 18UH 10% 1206 |
| 242489-000 | CWT-3811 |
| VI-J10-EX | CONVERTER MOD DC/DC 5V 75W |
| GEC20DRYH-S734 | CONN EDGECARD 40POS DIP .100 SLD |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9880XSTZ-100 | 制造商:Analog Devices 功能描述:IC, ANALOG/HDMI DUAL DISPLAY INTERFACE, PQFP100 |
| AD9882 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Displays |
| AD9882/PCB | 制造商:Analog Devices 功能描述:DUAL INTRFC FOR FLAT PNL DISPLAY 100LQFP - Bulk |
| AD9882A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Displays |
| AD9882A/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Displays |
發(fā)布緊急采購，3分鐘左右您將得到回復。