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參數(shù)資料
| 型號： | AD9788BSVZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 46/64頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT 800MSPS 100TQFP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 設計資源： | Powering the AD9788 Using ADP2105 for Increased Efficiency (CN0141) |
| 標準包裝： | 1,000 |
| 系列： | TxDAC® |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 450mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP 裸露焊盤 |
| 供應商設備封裝： | 100-TQFP-EP（14x14） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，單極；4 電流，雙極 |
| 采樣率（每秒）： | 800M |
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AD9785/AD9787/AD9788
Rev. A | Page 50 of 64
ANALOG OUTPUTS
Full-scale current on the I DAC and Q DAC can be set from
8.66 mA to 31.66 mA. Initially, the 1.2 V band gap reference is
used to set up a current in an external resistor connected to
I120 (Pin 75). A simplified block diagram of the reference
circuitry is shown in Figure 69.
I DAC
DAC FULL-SCALE
REFERENCE
CURRENT
SCALING
I DAC GAIN
Q DAC GAIN
Q DAC
AD9788
VREF
10k
5k
1.2V BAND GAP
REFERENCE
0.1F
I120
070
98
-03
0
Figure 69. Full-Scale Current Generation Circuitry
The recommended value for the external resistor is 10 kΩ,
which sets up an IREFERENCE in the resistor of 120 μA, which in
turn provides a DAC output full-scale current of 20 mA. Because
the gain error is a linear function of this resistor, a high precision
resistor improves gain matching to the internal matching
specification of the devices. Internal current mirrors provide
a current-gain scaling, where DAC gain is a 10-bit word in the
SPI port register (Register 0x05 and Register 0x07). The default
value for the DAC gain registers gives an IFS of approximately
20 mA, where IFS for either I DAC or Q DAC is equal to
32
1024
6
12
27
V
2
1
DAC gain
R
.
35
0
1000
DAC GAIN CODE
I FS
(m
A
)
30
25
20
15
10
5
200
400
600
800
07
09
8-
03
1
Figure 70. DAC Full-Scale Current vs. DAC Gain Code
DIGITAL AMPLITUDE SCALING
Gain scaling of the analog DAC output can be achieved by
changing the values in Register 0x05 and Register 0x07.
However, if this is done, the output common-mode voltage at
the analog output also decreases proportionally. This poses a
problem when the AD9785/AD9787/AD9788 are dc-coupled to
a quadrature modulator. Typical quadrature modulators have
tight restrictions on input common-mode variation.
The AD9785/AD9787/AD9788 use a digital gain scaling block
to get around this problem. Because the gain scaling is done in
the digital processing of the AD9785/AD9787/AD9788, there is
no effect on the output full-scale current. This digital gain
scaling is done in such a way that the midscale value of the
signal is unaffected; the swing of the signal around midscale is
the value that is adjusted with the register settings. Digital gain
scaling is done using the amplitude scale factor (ASF) register
(Register 0x0C).
Auxiliary DAC Operation
Two auxiliary DACs are provided on the AD9785/AD9787/
AD9788. The full-scale output current on these DACs is derived
from the 1.2 V band gap reference and external resistor. The
gain scale from the reference amplifier current, IREFERENCE, to the
auxiliary DAC reference current is 16.67 with the auxiliary DAC
gain set to full scale (10-bit values, Register 0x06, Bits [9:0] and
Register 0x08, Bits [9:0]). This gives a full-scale current of approx-
imately 2 mA for Auxiliary DAC 1 and Auxiliary DAC 2.
The auxiliary DAC outputs are not differential. Only one side of
the auxiliary DAC (P or N) is active at one time. The inactive side
goes into a high impedance state (100 kΩ). In addition, the P or N
output can act as a current source or a current sink. Control of
the P and N sides for both auxiliary DACs is via Register 0x06 and
Register 0x08, Bits [15:14]. When sourcing current, the output
compliance voltage is 0 V to 1.6 V. When sinking current, the
output compliance voltage is 0.8 V to 1.6 V.
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