參數(shù)資料
型號: AD9772
廠商: Analog Devices, Inc.
英文描述: 14-Bit,150 MSPS T×DAC+TM with 2× Interpolation Filter(單電源,過采樣,14位D/A轉(zhuǎn)換器)
中文描述: 14位,150 MSPS的DAC的商標厚× 2 ×插值濾波器(單電源,過采樣,14位的D / A轉(zhuǎn)換器)
文件頁數(shù): 8/30頁
文件大?。?/td> 341K
代理商: AD9772
REV. 0
AD9772
–8–
DEFINITIONS OF SPECIFICATIONS
Linearity Error (Also Called Integral Nonlinearity or INL)
Linearity error is defined as the maximum deviation of the actual
analog output from the ideal output, determined by a straight
line drawn from zero to full scale.
Differential Nonlinearity (or DNL)
DNL is the measure of the variation in analog value, normal-
ized to full scale, associated with a 1 LSB change in digital input
code.
Monotonicity
A D/A converter is monotonic if the output either increases or
remains constant as the digital input increases.
Offset Error
The deviation of the output current from the ideal of zero is
called offset error. For IOUTA, 0 mA output is expected when
the inputs are all 0s. For IOUTB, 0 mA output is expected
when all inputs are set to 1s.
Gain Error
The difference between the actual and ideal output span. The
actual span is determined by the output when all inputs are set
to 1s, minus the output when all inputs are set to 0s.
Output Compliance Range
The range of allowable voltage at the output of a current-output
DAC. Operation beyond the maximum compliance limits may
cause either output stage saturation or breakdown, resulting in
nonlinear performance.
Temperature Drift
Temperature drift is specified as the maximum change from the
ambient (+25
°
C) value to the value at either T
MIN
or T
MAX
.
For offset and gain drift, the drift is reported in ppm of full-
scale range (FSR) per degree C. For reference drift, the drift is
reported in ppm per degree C.
Power Supply Rejection
The maximum change in the full-scale output as the supplies
are varied from minimum to maximum specified voltages.
Settling Time
The time required for the output to reach and remain within a
specified error band about its final value, measured from the
start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in pV-s.
Spurious-Free Dynamic Range
The difference, in dB, between the rms amplitude of the output
signal and the peak spurious signal over the specified bandwidth.
Total Harmonic Distortion
THD is the ratio of the rms sum of the first six harmonic com-
ponents to the rms value of the measured fundamental. It is
expressed as a percentage or in decibels (dB).
Signal-to-Noise Ratio (SNR)
S/N is the ratio of the rms value of the measured output signal
to the rms sum of all other spectral components below the
Nyquist frequency, excluding the first six harmonics and dc.
The value for SNR is expressed in decibels.
Passband
Frequency band in which any input applied therein passes
unattenuated to the DAC output.
Stopband Rejection
The amount of attenuation of a frequency outside the passband
applied to the DAC, relative to a full-scale signal applied at the
DAC input within the passband.
Group Delay
Number of input clocks between an impulse applied at the
device input and peak DAC output current.
Impulse Response
Response of the device to an impulse applied to the input.
Adjacent Channel Power Ratio (or ACPR)
A ratio in dBc between the measured power within a channel
relative to its adjacent channel.
AD9772
3.0V
3.0V
FROM HP8644A
SIGNAL GENERATOR
3.0V
CLKVDD
CLKCOM
CLK+
1
3
CFILTER
CMUX
M
M
R
P
D
D
PLLCOM
LPF
PLLVDD
IOUTA
IOUTB
REFIO
FSADJ
REFLO
AVDD
ACOM
DVDD
DCOM
SLEEP
EDGE-
TRIGGERED
LATCHES
ZERO
STUFF
MUX
14-BIT DAC
100
V
MINI-CIRCUITS
T1–1T
20pF
50
V
50
V
20pF
1.91k
V
0.1
m
F
+1.2V REFERENCE
AND CONTROL AMP
AWG2021
OR
DG2020
DIGITAL
DATA
EXT.
CLOCK
HP8130
PULSE GENERATOR
CH1
CH2
EXT. INPUT
PLLCLOCK
MULTIPLIER
2
3
/4
3
CLK–
1k
V
1k
V
1
3
/2
3
CLOCK DISTRIBUTION
AND MODE SELECT
2
FIR
INTERPOLATION
FILTER
TO FSEA30
SPECTRUM
ANALYZER
Figure 3. Basic AC Characterization Test Setup
相關(guān)PDF資料
PDF描述
AD9773 12-Bit, 160 MSPS 2】/4】/8】 Interpolating Dual TxDAC+ D/A Converter
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AD9773EB 12-Bit, 160 MSPS 2】/4】/8】 Interpolating Dual TxDAC+ D/A Converter
AD9774AS 14-Bit, 32 MSPS TxDAC⑩ with 4x Interpolation Filters
AD9774EB 14-Bit, 32 MSPS TxDAC⑩ with 4x Interpolation Filters
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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AD9772AASTRL 制造商:Analog Devices 功能描述:DAC 1-CH Segment 14-bit 48-Pin LQFP T/R
AD9772AASTZ 功能描述:IC DAC 14BIT 160MSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散(最大):- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP,8-MSOP(0.118",3.00mm 寬) 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓,單極 采樣率(每秒):* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF)
AD9772AASTZRL 功能描述:IC DAC 14BIT 160MSPS 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散(最大):100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC(J 形引線) 供應(yīng)商設(shè)備封裝:28-PLCC(11.51x11.51) 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓,單極;1 電壓,雙極 采樣率(每秒):143k