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| 型號： | AD7725BSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT PROG 44MQFP |
| 產(chǎn)品變化通告： | AD7725BSZ Discontinuation 16/Mar/2012 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 900k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 30mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-MQFP（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個單端，雙極；1 個差分，雙極 |
| 配用： | EVAL-AD7725CBZ-ND - BOARD EVALUATION FOR AD7725 |
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REV. A
AD7725
–27–
A minimum etch technique is generally best for ground planes
as it gives the best shielding. Noise can be minimized by paying
attention to the system layout and preventing different signals
from interfering with each other. High level analog signals should
be separated from low level analog signals, and both should be
kept away from digital signals. In waveform sampling and recon-
struction systems, the sampling clock (CLKIN) is as vulnerable
to noise as any analog signal. CLKIN should be isolated from the
analog and digital systems. Fast switching signals like clocks
should be shielded with their associated ground to avoid radiating
noise to other sections of the board, and clock signals should
never be routed near the analog inputs.
Avoid running digital lines under the device, as these will couple
noise onto the die. The analog ground plane should be allowed
to run under the AD7725 to shield it from noise coupling. The
power supply lines to the AD7725 should use as large a trace as
possible (preferably a plane) to provide a low impedance path
and reduce the effects of glitches on the power supply line.
Avoid crossover of digital and analog signals. Traces on oppo-
site sides of the board should run at right angles to each other.
This will reduce the effects of feedthrough through the board.
0.1 F
AVDD
AGND
10nF
DVDD
DGND
5V
DGND
10 F +
10nF
AVDD1
AGND1
AVDD
AGND
10nF
AGND
0.1 F
10 F
5V
AGND
REF2
REF1
AGND2
220nF
10nF
1 F
ANALOG
GROUND
PLANE
DIGITAL
GROUND
PLANE
39
Figure 36. Reference and Supply Decoupling
OPTIMIZING HEAT REMOVAL BY PCB
CONSTRUCTION AND DEVICE MOUNTING
For normal still air conditions, the primary heat dissipation path
from the chip to the ambient is via the component leads into the
PCB. The thermal resistance of the board is then a significant
variable. This can be lowered by maximizing the use of ground
planes as heat sinks and also by optimizing the way in which the
heat can be dissipated, for example conduction into the board
mounting chassis. The greater the percentage of copper in the
board, especially in the region of the device, the lower the ther-
mal resistance. The use of wide tracks and thermal vias to the
ground plane will have a significant effect. Placing critical com-
ponents close to where the edge of the board is attached to the
chassis can provide additional cooling without the use of heat
sinks or forced air. Avoid close spacing of high power devices in
order to ensure that the heat is dissipated over the maximum
possible area.
EVALUATING THE AD7725 PERFORMANCE
There is an AD7725 evaluation package available that includes
a fully assembled and tested evaluation board, documentation,
and software for controlling the board from a PC via the Evalu-
ation Board Controller. The Evaluation Board Controller can
be used in conjunction with the AD7725 Evaluation Board (as
well as with many other Analog Devices evaluation boards ending
in the CB designator) to demonstrate/evaluate the performance of
the AD7725. The software allows the user to perform ac (Fast
Fourier Transform) and dc (Histogram of Codes) tests on the
AD7725. By downloading the filter design package, Filter
Wizard, user-defined filter files can be loaded into the AD7725
to program the postprocessor via the Evaluation Board Controller.
See the ADI website for more information.
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