參數(shù)資料
型號(hào): AD7725BSZ
廠商: Analog Devices Inc
文件頁數(shù): 1/28頁
文件大?。?/td> 0K
描述: IC ADC 16BIT PROG 44MQFP
產(chǎn)品變化通告: AD7725BSZ Discontinuation 16/Mar/2012
標(biāo)準(zhǔn)包裝: 1
位數(shù): 16
采樣率(每秒): 900k
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 30mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-QFP
供應(yīng)商設(shè)備封裝: 44-MQFP(10x10)
包裝: 托盤
輸入數(shù)目和類型: 2 個(gè)單端,單極;2 個(gè)單端,雙極;1 個(gè)差分,雙極
配用: EVAL-AD7725CBZ-ND - BOARD EVALUATION FOR AD7725
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
2004 Analog Devices, Inc. All rights reserved.
AD7725
16-Bit 900 kSPS - ADC with a
Programmable Postprocessor
FEATURES
Programmable Filtering:
Any Characteristic up to 108 Tap FIR and/or IIR
Polynomial Signal Conditioning up to 8th Order
Programmable Decimation and Output Word Rate
Flexible Programming Modes:
Boot from DSP or External EPROM
Parallel/Serial Interface
Internal Default Filter for Evaluation
14.4 MHz Max Master Clock Frequency
0 V to +4 V (Single-Ended) or
2 V (Differential) Input
Range
Power Supplies: AVDD, DVDD: 5 V
5%
On-Chip 2.5 V Voltage Reference
44-Lead MQFP Package
TYPICAL APPLICATIONS
Radar
Sonar
Auxiliary Car Functions
Medical Communications
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The AD7725 is a complete 16-bit, -
analog-to-digital con-
verter with on-chip, user-programmable signal conditioning. The
output of the modulator is processed by three cascaded finite
impulse response (FIR) filters, followed by a fully user-program-
mable postprocessor. The postprocessor provides processing
power of up to 130 million accumulates (MAC) per second. The
user has complete control over the filter response, the filter coeffi-
cients, and the decimation ratio.
The postprocessor permits the signal conditioning characteris-
tics to be programmed through a parallel or serial interface. It
is programmed by loading a user-defined filter in the form of a
configuration file. This filter can be loaded from a DSP or an
external serial EPROM. It is generated using a digital filter
design package called Filter Wizard, which is available from the
AD7725 section on the Analog Devices website.
Filter Wizard allows the user to design different filter types
and generates the appropriate configuration file to be down-
loaded to the postprocessor. The AD7725 also has an internal
default filter for evaluation purposes.
It provides 16-bit performance for input bandwidths up to
350 kHz with an output word rate of 900 kHz maximum. The
input sample rate is set either by the crystal oscillator or an
external clock.
This part has an accurate on-chip 2.5 V reference for the modu-
lator. A reference input/output function allows either the
internal reference or an external system reference to be used as
the reference source for the modulator.
The device is available in a 44-lead MQFP package and is speci-
fied over a –40
°C to +85°C temperature range.
2.5V
REFERENCE
POST-
PROCESSOR
DEFAULT FILTER
(ROM)
XTAL
CLOCK
PRESET
FILTER
MOD
CONTROL
LOGIC
UNI
HALF PWR
STBY
SYNC
S/
P
VIN (+)
VIN (–)
RD/
WR
SOE/CS
CFMT/RS
DVAL/INT
SDI/DB0
ERR
/DB1
DB2
DB3
RESETCFG
/DB4
INT/
DB5
FSI
/DB6
SCO
/DB7
SDO
/DB8
SCR/DB13
CFGEND/DB12
DB11
DB10
FSO/DB9
SMODE1/DB15
SMODE0/DB14
XTAL_OFF
XTAL
CLKIN
DVDD
DGND
REF2
REF1
AVDD
AGND
AD7725
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