參數(shù)資料
型號: AD7298-1BCPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 7/25頁
文件大?。?/td> 0K
描述: IC ADC 10BIT SPI/SRL 8CH 20LFCSP
標準包裝: 1
位數(shù): 10
采樣率(每秒): 1M
數(shù)據(jù)接口: DSP,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 23mW
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-WFQFN 裸露焊盤,CSP
供應商設備封裝: 20-LFCSP-WQ(4x4)
包裝: 標準包裝
輸入數(shù)目和類型: 8 個單端,單極
其它名稱: AD7298-1BCPZ-RLDKR
AD7298-1
Rev. A | Page 14 of 24
ADC Transfer Function
The output coding of the AD7298-1 is straight binary for the
analog input channel conversion results. The designed code
transitions occur at successive LSB values (that is, 1 LSB, 2 LSBs,
and so forth). The LSB size is VREF/1024 for the AD7298-1. The
ideal transfer characteristic for the AD7298-1 for straight binary
coding is shown in Figure 22.
111...111
111...110
111...000
011...111
000...010
000...001
000...000
1LSB = VREF/1024
ANALOG INPUT
NOTES
1. VREF IS 2.5V.
A
D
C
COD
E
+VREF – 1LSB
1LSB
0V
09321-
007
Figure 22. Straight Binary Transfer Characteristic
VDRIVE
The AD7298-1 also provides the VDRIVE feature. VDRIVE controls
the voltage at which the serial interface operates. VDRIVE allows
the ADC to easily interface to both 1.8 V and 3 V processors.
For example, if the AD7298-1 were operated with a VDD of
3.3 V, the VDRIVE pin could be powered from a 1.8 V supply.
This enables the AD7298-1 to operate with a larger dynamic
range with a VDD of 3.3 V while still being able to interface to
1.8 V processors. Take care to ensure VDRIVE does not exceed
VDD by more than 0.3 V (see the Absolute Maximum Ratings
section).
THE INTERNAL OR EXTERNAL REFERENCE
The AD7298-1 can operate with either the internal 2.5 V on-chip
reference or an externally applied reference. The EXT_REF bit
in the control register is used to determine whether the internal
reference is used. If the EXT_REF bit is selected in the control
register, an external reference can be supplied through the VREF
pin. At power-up, the internal reference is enabled. Suitable
external reference sources for the AD7298-1 include AD780,
The internal reference circuitry consists of a 2.5 V band gap
reference and a reference buffer. When the AD7298-1 is operated
in internal reference mode, the 2.5 V internal reference is
available at the VREF pin, which should be decoupled to GND1
using a 10 F capacitor. It is recommended that the internal
reference be buffered before applying it elsewhere in the system.
The internal reference is capable of sourcing up to 2 mA of current
when the converter is static. The reference buffer requires 5.5 ms to
power up and charge the 10 F decoupling capacitor during the
power-up time.
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