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| 型號： | AD7190BRUZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/41頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 2CH 24BIT W/PGA 24TSSOP |
| 設(shè)計(jì)資源： | Precision Weigh Scale Design Using AD7190 with Internal PGA (CN0102) |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 4.8k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個(gè)差分，雙極；4 個(gè)偽差分，雙極 |
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Data Sheet
AD7190
Rev. C | Page 23 of 40
CON23
CON22
CON21
CON20
CON19
CON18
CON17
CON16
Chop(0)
0(0)
REFSEL(0)
0(0)
(0)
CON15
CON14
CON13
CON12
CON11
CON10
CON9
CON8
CH7(0)
CH6(0)
CH5(0)
CH4(0)
CH3(0)
CH2(0)
CH1(0)
CH0(1)
CON7
CON6
CON5
CON4
CON3
CON2
CON1
CON0
Burn(0)
REFDET(0)
0(0)
BUF(1)
U/B (0)
G2(1)
G1(1)
G0(1)
Table 19. Configuration Register Bit Designations
Bit Location
Bit Name
Description
CON23
Chop
Chop enable bit. When the chop bit is cleared, chop is disabled. When the chop bit is set, chop is
enabled. When chop is enabled, the offset and offset drift of the ADC are continuously minimized.
However, this increases the conversion time and settling time of the ADC. For example, when FS = 96
decimal and the sinc4 filter is selected, the conversion time with chop enabled equals 80 ms and the
settling time equals 160 ms. With chop disabled, higher conversion rates are allowed. For an FS word of
96 decimal and the sinc4 filter selected, the conversion time is 20 ms and the settling time is 80 ms.
However, at low gains, periodic calibrations may be required to remove the offset and offset drift.
CON22, CON21
These bits must be programmed with a Logic 0 for correct operation.
CON20
REFSEL
Reference select bits. The reference source for the ADC is selected using these bits.
REFSEL
Reference Voltage
0
External reference applied between REFIN1(+) and REFIN1(
).
1
External reference applied between the P1/REFIN2(+) and P0/REFIN2(-) pins.
CON19 to CON16
These bits must be programmed with a Logic 0 for correct operation.
CON15 to CON8
CH7 to CH0
Channel select bits. These bits are used to select which channels are enabled on the AD7190. See Table 20.
Several channels can be selected, and the AD7190 automatically sequences them. The conversion on
each channel requires the complete settling time.
CON7
Burn
When this bit is set to 1, the 500 nA current sources in the signal path are enabled. When burn = 0, the
burnout currents are disabled. The burnout currents can be enabled only when the buffer is active and
when chop is disabled.
CON6
REFDET
Enables the reference detect function. When set, the NOREF bit in the status register indicates when the
external reference being used by the ADC is open circuit or less than 0.6 V maximum. The reference
detect circuitry only operates when the ADC is active.
CON5
This bit must be programmed with a Logic 0 for correct operation.
CON4
BUF
Enables the buffer on the analog inputs. If cleared, the analog inputs are unbuffered, lowering the
power consumption of the device. If set, the analog inputs are buffered, allowing the user to place
source impedances on the front end without contributing gain errors to the system. With the buffer
disabled, the voltage on the analog input pins can be from 50 mV below AGND to 50 mV above AVDD.
When the buffer is enabled, it requires some headroom; therefore, the voltage on any input pin must be
limited to 250 mV within the power supply rails.
CON3
U/B
Polarity select bit. When this bit is set, unipolar operation is selected. When this bit is cleared, bipolar
operation is selected.
CON2 to CON0
G2 to G0
Gain select bits. Written by the user to select the ADC input range as follows:
G2
G1
G0
Gain
ADC Input Range (5 V Reference, Bipolar Mode)
0
1
±5 V
0
1
Reserved
0
1
0
Reserved
0
1
8
±625 mV
1
0
16
±312.5 mV
1
0
1
32
±156.2 mV
1
0
64
±78.125 mV
1
128
±39.06 mV
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