參數(shù)資料
型號: AD6652BBC
廠商: ANALOG DEVICES INC
元件分類: 通信及網(wǎng)絡(luò)
英文描述: 12-Bit, 65 MSPS IF to Baseband Diversity Receiver
中文描述: SPECIALTY TELECOM CIRCUIT, PBGA256
封裝: 17 X 17 MM, BGA-256
文件頁數(shù): 36/76頁
文件大?。?/td> 1839K
代理商: AD6652BBC
AD6652
rCIC2 OUTPUT LEVEL
After the prop
level from the rCIC2 stage can be determined using the
following equation:
(
)
L
rCIC
2
2
Rev. 0 | Page 36 of 76
er scaling factor has been determined, the output
level
input
M
OL
rCIC
×
rCIC
_
2
2
×
=
rCIC
S
2
2
le (or 1) from the ADC to the
illustrates the amount o
the data rate into the rC
scaled to any other a
table can be u
decimation between rCIC2, CIC5, and the RCF.
th in percentage of
he data in this table can be
rate up to 65 MHz. The
to distribute the
ide how
IC2 stag
llowable sam
sed as a tool to dec
e sample rate that
is rep
ented by the pass band, as follows:
where:
input_level
is normally full sca
rCIC2 stage.
OL
rCIC2
is the output level from the rCIC2 stage expressed as a
fraction of the
input_level
.
OL
rCIC2
is used later in the CIC5
stage-level calculations.
rCIC2 REJECTION
Table 14
f bandwid
e. T
ple
Example Calculations:
Goal:
Implement a filter with an input sample rate of 10 MHz,
requiring 100 dB of alias rejection for a ±7 kHz pass band.
Solution:
First determine the percentage of th
res
07
.
MHz
10
kHz
7
100
=
×
=
fraction
BW
Then find the 100 dB column on the right of the table and
look down this column for a value greater than or equal to the
pass-band percentage of the clock rate. Then look across to the
extreme left column and find the corresponding rate change
factor (M
rCIC2
/L
rCIC2
). Referring to the table, notice that for a
M
rCIC2
/L
rCIC2
of 4, the frequency having 100 dB of alias
rejection is 0.071%, which is slightly greater than the 0.07%
calculated. Therefore, for this example, the maximum bound on
rCIC2 rate change is 4. A higher chosen M
rCIC2
/L
rCIC2
means less
alias rejection than the 100 dB required.
An M
rCIC2
/L
rCIC2
of less than 4 would still yield the required
rejection; however, power consumption can be minimized by
decimating as much as possible in this rCIC2 stage. Decimation
in rCIC2 lowers the data rate, and, therefore, reduces power
is the same as an L/M ratio of 0.25. Thus, any
integer combination of L/M that yields 0.25 works (1/4, 2/8, o
4/16). However, for the best dynamic range, use the simplest
ratio. For example, 1/4 gives better performance than 4/16.
Table 14. SSB rCIC2 Alias Rejection Table (
f
SAMP
= 1)
Bandwidth Shown in Percentage of
f
SAMP
r
M
rCIC2
/
L
rCIC2
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
B
consumed in subsequent stages. It should also be noted that
there is more than one way to get the decimation by 4. A
decimation of 4
50 dB
1.79
1.508
1.217
1.006
0.853
0.739
0.651
0.581
0.525
0.478
0.439
0.406
0.378
0.353
0.331
60 dB
1.007
0.858
0.696
0.577
0.49
0.425
0.374
0.334
0.302
0.275
0.253
0.234
0.217
0.203
0.19
70 dB
0.566
0.486
0.395
0.328
0.279
0.242
0.213
0.19
0.172
0.157
0.144
0.133
0.124
0.116
0.109
80 dB
0.318
0.274
0.223
0.186
0.158
0.137
0.121
0.108
0.097
0.089
0.082
0.075
0.07
0.066
0.061
90 dB
0.179
0.155
0.126
0.105
0.089
0.077
0.068
0.061
0.055
0.05
0.046
0.043
0.04
0.037
0.035
100 d
0.101
0.087
0.071
0.059
0.05
0.044
0.038
0.034
0.031
0.028
0.026
0.024
0.022
0.021
0.02
DECIMATION AND INTERPOLATION REGISTERS
rCIC2 decimation values are stored in Register 0x90. This 1
register contains the decim
ation value minus 1. The interpola-
tion portion is stored in Register 0x91. This 9-bit value holds
the interpolation value minus one.
2-bit
rCIC2 SCALE REGISTER
Register 0x92 contains the scaling information for the rCIC2.
The primary function is to store the scale value computed in the
previous sections.
Bits 4–0 of this register should be written with the same values
as those written to Bits 9–5 to accommodate a redundant
internal hardware feature.
Bits 9–5 (S
rCIC2
) contain the 5-bit scaling factor for rCIC2.
Bits 11–10 are reserved and must be written low.
In applications that do not require the features of the rCIC2,
bypass it by setting the L/M ratio to 1/1. This effectively
bypasses all circuitry of the rCIC2 except the scaling, which is
still effectual.
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