參數(shù)資料
型號(hào): AD1981BJST-REEL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 8/32頁(yè)
文件大?。?/td> 0K
描述: IC CODEC STEREO MICPREAMP 48LQFP
標(biāo)準(zhǔn)包裝: 1
系列: SoundMAX®
類型: 音頻編解碼器 '97
數(shù)據(jù)接口: 串行
分辨率(位): 16,20 b
ADC / DAC 數(shù)量: 4 / 2
三角積分調(diào)變: 無(wú)
動(dòng)態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 85 / 90
電壓 - 電源,模擬: 4.5 V ~ 5.5 V
電壓 - 電源,數(shù)字: 3 V ~ 3.47 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: AD1981BJSTREELDKR
AD1981B
Rev. C | Page 16 of 32
MIC VOLUME REGISTER
Index 0x0E
Reg No.
Name
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Default
0x0E
MIC Volume
MCM
X
M20
X
MCV4
MCV3
MCV2
MCV1
MCV0
0x8008
All registers are not shown, and bits containing an X are assumed to be reserved. Refer to Table 17 for examples.
Table 16.
Bit
Mnemonic
Function
MCV [4:0]
MIC Volume Gain
Allows setting the phone volume attenuator in 32 volume levels with 31 steps of 1.5 dB each. The LSB
represents 1.5 dB, and the gain range is +12 dB to 34.5 dB. The default value is 0 dB, with the mute bit
enabled.
M20
MIC Gain Boost
This bit allows setting additional MIC gain to increase the microphone sensitivity. The nominal gain
boost by default is 20 dB; however, Bits D0 and D1 (MBG [1:0]) on the miscellaneous control bits register
(0x76) allow changing the gain boost to 10 dB or 30 dB, if necessary.
0 = Disabled; Gain = 0 dB
1 = Enabled; Default Gain = 20 dB (see Register 0x76, Bits D0, D1)
MCM
MIC Mute
When this bit is set to 1, the MIC channel is muted.
Table 17. Volume Settings for Phone and MIC
Control Bits D [4:0] Phone (0x0C) and MIC (0x0E)
D15
Write
Readback
Function
0
0 0000
12 dB Gain
0
0 1000
0 dB Gain
0
1 1111
34.5 dB Gain
1
X XXXX
∞ db Gain, Muted
X is a wild card, and has no effect on the value.
LINE-IN VOLUME REGISTER
Index 0x10
Reg No.
Name
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Default
0x10
Line-In Volume
LVM
X
LLV4
LLV3
LLV2
LLV1
LLV0
X
RLV4
RLV3
RLV2
RLV1
RLV0
0x8808
1For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels.
If MSPLT is not set, the RM bit has no effect. All registers are not shown, and bits containing an X are assumed to be reserved. Refer to
for examples.
Table 22
Table 18.
Bit
Mnemonic
Function
RLV [4:0]
Line-In Volume Right
Allows setting the line-in right-channel attenuator in 32 volume levels. The LSB represents 1.5 dB, and
the range is +12 dB to 34.5 dB. The default value is 0 dB, mute enabled.
RM
Right-Channel Mute
Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel separately from the
LM bit. Otherwise, this bit always reads 0 and has no effect when set to 1.
LLV [4:0]
Line-In Volume Left
Allows setting the line-in left-channel attenuator in 32 volume levels. The LSB represents 1.5 dB, and
the range is +12 dB to 34.5 dB. The default value is 0 dB, mute enabled.
LVM
Line-In Mute
When this bit is set to 1, both the left and right channels are muted, unless the MSPLT bit in
Register 0x76 is set to 1, in which case this mute bit affects only the left channel.
OBSOLETE
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