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參數(shù)資料
| 型號： | AD1981BJST-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/32頁 |
| 文件大小： | 0K |
| 描述： | IC CODEC STEREO MICPREAMP 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | SoundMAX® |
| 類型： | 音頻編解碼器 '97 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 16，20 b |
| ADC / DAC 數(shù)量： | 4 / 2 |
| 三角積分調(diào)變： | 無 |
| 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： | 85 / 90 |
| 電壓 - 電源，模擬： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，數(shù)字： | 3 V ~ 3.47 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD1981BJSTREELDKR |
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AD1981B
Rev. C | Page 27 of 32
JACK SENSE/AUDIO INTERRUPT/STATUS REGISTER
Index 0x72
Reg
No.
Name
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Default
0x72
Jack
Sense
X
JS
MT2
JS
MT1
JS
MT0
JS1
EQB
JS0
EQB
JS1
TMR
JS0
TMR
JS1
MD
JS0
MD
JS1
ST
JS0
ST
JS1
INT
JS0
INT
0x0000
All register bits are read/write except for JS0ST and JS1ST, which are read-only.
All registers are not shown, and bits containing an X are assumed to be reserved.
Table 40.
Bit
Mnemonic
Function
JS0INT
JS0 Interrupt
This bit indicates that Pin JS0 has generated an interrupt. This bit remains set until the software
services the JS0 interrupt, that is, JS0 ISR should clear this bit by writing a 0 to it.
The interrupt to the system is an OR combination of this bit and JS1INT.
The actual interrupt implementation is selected by the INTS bit (Register 0x76). It is also possible to
generate a software system interrupt by writing a 1 to this bit.
JS1INT
Js1 Interrupt
This bit indicates that Pin JS1 has generated an interrupt. This bit remains set until the software
services the JS1 interrupt, that is, JS1 ISR should clear this bit by writing a 0 to it. See the JS0INT
description for details.
JS0ST
JS0 State
This bit always reports the logic state of the JS0 pin.
JS1ST
JS1 State
This bit always reports the logic state of the JS1 pin.
JS0MD
JS0 Mode
This bit selects the operation mode for the JS0 pin.
0 = Jack sense mode (default).
1 = Interrupt mode.
JS1MD
JS1 Mode
This bit selects the operation mode for the JS1 pin.
0 = Jack sense mode (default).
1 = Interrupt mode.
JS0TMR
JS0 Timer Enable
If this bit is set to 1, JS0 must be high for >278 ms to be recognized.
JS1TMR
JS1 Timer Enable
If this bit is set to 1, JS1 must be high for >278 ms to be recognized.
JS0EQB
JS0 EQ Bypass Enable
This bit enables JS0 to control the EQ bypass. When this bit is set to 1, JS0 = 1 causes the EQ to be
bypassed.
JS1EQB
JS1 EQ Bypass Enable
This bit enables JS1 to control the EQ bypass. When this bit is set to 1, JS1 = 1 causes the EQ to be
bypassed.
JSMT [2:0]
JS Mute Enable
Selector
These three bits select and enable the jack sense muting action (see Table 41).
OBSOLETE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1981BJSTZ | 制造商:Analog Devices 功能描述:IC AUDIO CODEC |
| AD1981BJSTZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:AC 97 SoundMAX Codec |
| AD1981BJSTZ2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:AC ’97 SoundMAX Codec |
| AD1981BJSTZ-REEL | 制造商:Analog Devices 功能描述:Audio Codec 4ADC / 2DAC 20-Bit 48-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:AC'97 SOUNDMAX CODEC W/STEREO MIC PREAMP - Tape and Reel 制造商:Analog Devices 功能描述:IC AUDIO CODEC |
| AD1981BJSTZ-REEL2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:AC ’97 SoundMAX Codec |
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