參數(shù)資料
型號： 9S12XDP512DGV1
英文描述： Device User Guide for Mask Set 0L40V ( First Silicon)
中文描述： 設備用戶指南掩模組0L40V（第一硅）
文件頁數(shù)： 63/152頁
文件大小： 1231K
代理商： 9S12XDP512DGV1
63
1.7 Part ID Assignments
The part ID is located in two 8-bit registers PARTIDH and PARTIDL (addresses $001A and $001B). The
read-only value is a unique part ID for each revision of the chip.
Table 1-2
shows the assigned part ID
number and Mask Set number.
$03C0 - $07FF
Reserved
Address
$03C0
- $07FF
Name
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
Reserved
Read:
Write:
Table 1-2 Assigned Part ID Numbers
Device
Mask Set Number
L40V
Part ID
1
$C400
NOTES
:
1. The coding is as follows:
Bit 15-12: Major family identifier
Bit 11-8: Minor family identifier
Bit 7-4: Major mask set revision number including FAB transfers
Bit 3-0: Minor - non full - mask set revision
MC9S12XDP512
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
9S12XDP512DGV2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Device User Guide for Mask Set L15Y - (Second Silicon - Enhanced Feature Set)
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