參數(shù)資料
型號(hào): 935270056512
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC68
封裝: PLASTIC, MS-018, SOT-188-2, LCC-68
文件頁(yè)數(shù): 15/52頁(yè)
文件大?。?/td> 680K
代理商: 935270056512
Philips Semiconductors
SC16C754
Quad UART with 64-byte FIFO
Product data
Rev. 02 — 14 March 2003
22 of 49
9397 750 11192
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Remark: Refer to the notes under Table 9 for more register access information.
7.1 Receiver holding register (RHR)
The receiver section consists of the receiver holding register (RHR) and the receiver
shift register (RSR). The RHR is actually a 64-byte FIFO. The RSR receives serial
data from the RX terminal. The data is converted to parallel data and moved to the
RHR. The receiver section is controlled by the line control register. If the FIFO is
disabled, location zero of the FIFO is used to store the characters.
Remark: In this case, characters are overwritten if overow occurs.
If overow occurs, characters are lost. The RHR also stores the error status bits
associated with each character.
7.2 Transmit holding register (THR)
The transmitter section consists of the transmit holding register (THR) and the
transmit shift register (TSR). The THR is actually a 64-byte FIFO. The THR receives
data and shifts it into the TSR, where it is converted to serial data and moved out on
the TX terminal. If the FIFO is disabled, the FIFO is still used to store the byte.
Characters are lost if overow occurs.
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