參數(shù)資料
型號: 908E621_07
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror
中文描述: 綜合四半橋和三高的嵌入式微控制器和LIN高端側(cè)鏡
文件頁數(shù): 32/62頁
文件大小: 540K
代理商: 908E621_07
Analog Integrated Circuit Device Data
Freescale Semiconductor
32
908E621
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
A0 INPUT AND ANALOG MULTIPLEXER
A0 - Analog Input
Input A0 is an analog input used for reading switches or as
analog inputs for potentiometers, NTC, etc.
A0 is internally connected to the analog multiplexer. This
terminal offers a switchable current source. To read the
Analog Input the terminal has to be selected with the SS[3:0]
bits in the A0MUCTL register.
Figure 17. Analog Input and Multiplexer
A0 Current Source
The terminal A0 provides a switchable current source, to
be able to read in switches, NTC, etc. without the need of an
additional supply line for the sensor. The overall enable of
this feature is done by setting the PSON bit in the System
Control register.
In addition the terminal has to be selected
with the SS[3:0] bits. The current source can be enabled with
Bit CSON and adjusted with the bits CSSEL[1:0].
With the CSSEL[1:0] bit’s four different current values can
be selected (40, 120, 320 and 800μA). This function is
ceased during STOP and SLEEP mode operation.
The current source is derived from the Vdd voltage and is
constant up to an output voltage of ~4.75V.
To calibrate the current sources an extra terminal (A0CST)
is foreseen. On this terminal an accurate resistor can to be
connected. Switching the current sources to this resistor
allows the user to measure the current and use the measured
value for calculating the current on A0.
Analog Multiplexer / ADOUT terminal
The ADOUT terminal is the analog output interface to the
Analog-to-digital converter of the MCU. To be able to have
different sources for the MCU with one single signal an
Analog
Multiplexer
ADOUT
1%
PSON
CSON
CSSEL
SSx
4
Source Selection Bits
VDD
A0CST
Analog Port A0/A0CST
Selectable
Current
Source
A0
SS[0:3]
I
A0
(U
A0
)
U
A0
[V]
5
4.75
100%
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