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參數(shù)資料
| 型號： | 8213AM |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 18/33頁 |
| 文件大?。?/td> | 171K |
| 代理商： | 8213AM |
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SM8213AM
NIPPON PRECISION CIRCUITS—18
BS-test
This mode is used to test the RF stage operation, and
is only available from write mode. BS1 and BS3 are
held HIGH for RF stage testing.
After testing, BS-test mode is released using the
decoder set start command, and operation starts from
preamble mode.
Note that issuing the BACK-UP command is prohib-
ited in BS-test mode.
Start
This command is used to return to normal operation
from back-up, write and BS-test modes. Operation
always restarts from preamble mode.
Note the following points when setting commands:
I
Immediately after ATTN goes LOW
Commands send 8 SCK clock cycles to the
decoder and the received data is sent using 32
clock cycles immediately after ATTN goes LOW.
However, apart from the 8 clock cycles needed for
the command, 32 clock cycles are needed to
release ATTN. Note that during this time, there is
no guarantee of data.
I
When ATTN is HIGH
After command is transferred and until ATTN
goes LOW for the next transmit ready data signal,
the series processing should be such that it takes
less than {32
×
(bit rate)} time. If it takes longer
than this amount of time, the command setting
may be delayed (relative to normal operation)
when ATTN goes LOW. Note that during this
time, there is no guarantee of data.
When ATTN goes HIGH (excluding write mode),
SCK is examined to determine if the signal is a
break, back-up, write or read command. During mes-
sage reception, ATTN is temporarily held HIGH if a
command is issued to set ATTN LOW. This delay
ensures that the data from the decoder is not misin-
terpreted. And in this case, even if ATTN keeps
LOW, transmitted receiving data is unstable.
Figure 10. Auxiliary operating mode timing
SCK
SDI
:
8-bit
×
1-byte = 8-bit unit time clock
:
8-bit
×
1-byte = 8-bit unit time data
Decoder Setting Data
Current Mode
Next Mode
Decoder Mode
Refer to the AC Characteristics section for detailed timing specifications.
START command : 66 bit time max
Others : 2 bit time max
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| 8215-8009 | STECKER SUB D STAHLKRAGEN 15POL |
| 8225-8009 | STECKER SUB D STAHLKRAGEN 25POL |
| 8209-8009 | STECKER SUB D STAHLKRAGEN 9POL |
| 8237-8009 | STECKER SUB D STAHLKRAGEN 37POL |
| 821INSTSET | MPC821 PowerPC Instruction Set |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 8213B/13 | 制造商:WIELAND 功能描述:15 A, STRIP TERMINAL BLOCK, 1 ROW, 1 DECK |
| 8213B/15VR | 制造商:Wieland 功能描述:15 A, STRIP TERMINAL BLOCK, 1 ROW, 1 DECK |
| 8213B/20 | 制造商:WIELAND 功能描述:15 A, STRIP TERMINAL BLOCK, 1 ROW, 1 DECK |
| 8213B/3-OB | 制造商:Wieland Electric Inc 功能描述: |
| 8213B/4 | 制造商:Wieland 功能描述:15 A, STRIP TERMINAL BLOCK, 1 ROW, 1 DECK |
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