參數(shù)資料
型號: 8213AM
英文描述: Telecommunication IC
中文描述: 通信集成電路
文件頁數(shù): 11/33頁
文件大?。?/td> 171K
代理商: 8213AM
SM8213AM
NIPPON PRECISION CIRCUITS—11
Operating Modes
The SM8213AM has four operating modes—Power-
ON (Write), Preamble, Idle and Lock modes.
Power-ON mode
After power is applied, the internal registers should
be reset using RSTN.
When ATTN goes HIGH, the decoder sends a write
request for a decoder set read command and then
waits for the microcontroller (decoder set write com-
mand timing starts approximately 50 ms after reset,
but you should allow at least 900 ms for the oscilla-
tor internal to start and stabilize). The internal opera-
tion in write mode takes place at the same timing as
for 1200 bps speed mode.
Write data is prepared in 32-bit batches of 1 parame-
ter batch and 8 address data batches for a total of 9
batches.
Ensure that there are not multiple writes requests to
turn ON the same address. Also, allow a minimum of
1.67 ms after transferring each command or data
before issuing the next processing command.
The parameter and address set commands are pro-
cessed in sync with the decoder internal clock (1200
Hz). As a consequence, a gap of 28.4 ms minimum
should be left between batches to provide time for
processing. Alternatively, data can be written by first
using the decoder set read command to confirm
whether or not processing is still in progress (BUSY)
before writing each batch. If the time gap is 28.4 ms
or greater, confirmation (READY) is not required.
After parameters and all addresses have been written
and after decoder processing, the decoder set start
command transfers operation from write mode and
starts preamble mode operation.
When setting parameters and addresses in write
mode, the SCK clock frequency should not be less
than 1200 Hz. If this occurs, the SCK counter is rein-
itialized. This function, however, does make restor-
ing operation easy even if this or another clock is
accidentally input.
In write mode, after power is applied and after reset
initialization, all 9 batches (1 parameter and 8
address batches) should be set. If not all batches are
set, subsequent operation may become unstable.
Figure 4. Power-ON mode timing
BUSY
RSTN
SCK
SDI
SDO
BUSY
WRITE MODE
PREAMBLE MODE
: 8-bit unit time data
: 8-bit unit time clock
: 8-bit unit time indeterminate data
D A T
A
D A T
A
READ
READY
START
READ
D A T
A
: 32-bit unit time parameter/address data
READY
READ
Refer to the AC Characteristics section for detailed timing specifications.
max.
28.4ms
1 ms min
max 900ms
129ms max
129ms max
max.
1.67ms
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