參數(shù)資料
型號(hào): 75V16F64GS16
廠商: Integrated Silicon Solution, Inc.
英文描述: 64 Mbit FLASH MEMORY AND 16 Mbit PSEUDO SRAM STACKED MULTI-CHIP PACKAGE (MCP)
中文描述: 64兆位閃存和16兆位偽靜態(tài)存儲(chǔ)器堆疊式多芯片封裝(MCP)技術(shù)
文件頁數(shù): 35/50頁
文件大?。?/td> 255K
代理商: 75V16F64GS16
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION
Rev. 00A
08/01/02
35
75V16F64GS16
ISSI
PSRAM READ OPERATIONS
Value
Parameter
Symbol
Min.
Max.
Unit
Read Cycle Time
Chip Enable Access Time
(1,3)
Output Enable Access Time
(1)
Chip Enable Access Time
(1,4)
Output Data Hold Time
(1)
CE
1r Low to Output Low-Z
(2)
OE
Low to Output Low-Z
(2)
CE
1r High to Output High-Z
(2)
OE
High to Output High-Z
(2)
Address Setup Time to
CE
1r Low
(5)
Address Setup Time to
OE
(3,6)
Address Setup Time to
OE
(7)
Address Invalid Time
(4)
CE
1r Low to Address Hold Time
(4)
OE
Low to Address Hold Time
(4,8)
t
RC
90
ns
t
CE
80
ns
t
OE
45
ns
t
AA
80
ns
t
OH
5
ns
t
CLZ
5
ns
t
OLZ
0
ns
t
CHZ
30
ns
t
OHZ
25
ns
t
ASC
-5
ns
t
ASO
45
ns
t
ASO
(
ABS
)
10
ns
t
AX
5
ns
t
CLAH
90
ns
t
OLAH
45
ns
CE
1r High to Address Hold Time
t
CHAH
-5
ns
OE
High to Address Hold Time
CE
1r Low to
OE
Low DelayTime
(4,6,8,9)
OE
Low to
CE
1r High DelayTime
(8)
t
OHAH
-5
ns
t
CLOL
45
1000
ns
t
OLCH
45
ns
CE
1r High Pulse Width
OE
High Pulse Width
(6,8,9)
OE
High Pulse Width
(7)
Notes:
1. The output load is 30 pF.
2. The output load is 5 pF.
3. The t
CE
is applicable if
OE
is brought to Low before
CE
1r goes Low and is also applicable if actual value of both
or either t
ASO
or t
CLOL
is shorter than specified value.
4. Applicable only to A0 and A1 when both
CE
1r and
OE
are kept at Low for the address access.
5. Applicable if
OE
is brought to Low before
CE
1r goes Low.
6. The t
ASO
, t
CLOL
(Min) and top (Min) are reference values when the access time is determined by t
OE
.
If actual value of each parameter is shorter than specified minimum value, t
OE
becomes longer by the amount
of subtracting actual value from specified minimum value.
For example, if actual t
ASO
, t
ASO
(actual) , is shorter than specified minimum value, t
ASO
(Min) , during
OE
control
access (i.e.,
CE
1r stays Low) , the t
OE
becomes t
OE
(Max) + t
ASO
(Min) - t
ASO
(actual) .
7. The t
ASO
[
ABS
] and t
OP
[
ABS
] are the absolute minimum values during
OE
control access.
8. If actual value of either t
CLOL
or t
OP
is shorter than specified minimum value, both t
OLAH
and t
OLCH
become t
RC
(Min)
- t
CLOL
(actual) or t
RC
(Min) - t
OP
(actual) .
9. Maximum value is applicable if
CE
1r is kept at Low
.
t
CP
20
ns
t
OP
45
1000
ns
t
OP
(
ABS
)
20
ns
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