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參數(shù)資料
| 型號(hào)： | 75V16F64GS16 |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 64 Mbit FLASH MEMORY AND 16 Mbit PSEUDO SRAM STACKED MULTI-CHIP PACKAGE (MCP) |
| 中文描述： | 64兆位閃存和16兆位偽靜態(tài)存儲(chǔ)器堆疊式多芯片封裝（MCP）技術(shù) |
| 文件頁(yè)數(shù)： | 17/50頁(yè) |
| 文件大?。?/td> | 255K |
| 代理商： | 75V16F64GS16 |
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Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION
Rev. 00A
08/01/02
17
75V16F64GS16
ISSI
FLASH MEMORY COMMAND DEFINITIONS
(Continued)
PD = Data to be programmed at location PA. Data is
latched on the rising edge of write pulse.
SPA = Sector group address to be protected.
Set sector group address and (A6, A3, A2, A1, A0) =
(0, 0, 0, 1, 0).
SD = Sector group protection verify data. Output 01h at
protected sector group addresses and output 00h at
unprotected sector group addresses.
HRA = Address of the Hi-ROM area : 000000h to
00007Fh
HRBA = Bank Address of the Hi-ROM area (A21 = A20
= A19 = VIL)
The system should generate the following address
patterns : 555h or 2AAh to addresses A10 to A0
Both Read/Reset commands are functionally
equivalent, resetting the device to the read mode.
Command combinations not described in “Flash
Memory Command Definitions” are illegal.
Notes:
Address bits A21 to A11 = X = “H” or “L” for all
address commands except or Program Address (PA),
Sector Address (SA) , and Bank Address (BA) , and
Sector Group Address (SPA) .
Bus operations are defined in "DEVICE BUS
OPERATIONS”.
RA = Address of the memory location to be read
PA = Address of the memory location to be
programmed
Addresses are latched on the falling edge of the write
pulse.
SA = Address of the sector to be erased. The
combination of A21, A20, A19, A18, A17, A16, A15,
A14, A13, and A12 will uniquely select any sector.
BA = Bank Address (A21, A20, A19)
RD = Data read from location RA during read
operation.
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