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MOTOROLA
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MC68HC05BD7 Rev. 2.0
GENERAL RELEASE SPECIFICATION
LIST OF FIGURES
Figure 1-1: MC68HC05BD7 Block Diagram.....................................................................4
Figure 1-2: MC68HC05BD7/BD2 40-Pin DIP Pin Assignment.........................................5
Figure 1-3: MC68HC05BD7/BD2 42-Pin SDIP Pin Assignment.......................................6
Figure 1-4: Oscillator Connections...................................................................................7
Figure 2-1: The 16K Memory Map of the MC68HC05BD7.............................................11
Figure 2-2: MC68HC05BD7 I/O Register $00-$0F.........................................................12
Figure 2-3: MC68HC05BD7 I/O Register $10-$1F.........................................................13
Figure 2-4: MC68HC05BD7 I/O Register $20-$2F.........................................................14
Figure 3-1: MC68HC05 Programming Model.................................................................17
Figure 4-1: Interrupt Processing Flowchart ....................................................................22
Figure 4-2: External Interrupt..........................................................................................24
Figure 6-1: Mode Entry Diagram....................................................................................30
Figure 6-2: WAIT Flowcharts..........................................................................................32
Figure 7-1: Port I/O Circuitry...........................................................................................34
Figure 8-1: PWM Data Register .....................................................................................37
Figure 8-2: Relationship Between 5-Bit PWM and 3-Bit BRM........................................38
Figure 8-3: PWM Open-Drain Option Register...............................................................38
Figure 9-1: Software Flowchart of Slave Mode Interrupt Routine...................................47
Figure 9-2: Software Flowchart in Master mode: (a) Mode setup. (b) Interrupt routine..48
Figure 10-1: CLAMP output waveform...........................................................................50
Figure 12-1: Structure of A/D Converter.........................................................................61