參數(shù)資料
型號: μPD78F9177Y
廠商: NEC Corp.
英文描述: 8 Bit Single Chip Microcontrollers(8 位單片微控制器)
中文描述: 8位單片機微控制器(8位單片微控制器)
文件頁數(shù): 78/150頁
文件大?。?/td> 653K
代理商: ΜPD78F9177Y
Preliminary Product Information
76
μ
PD78F9177Y
(2) SMB0 configuration
SMB0 consists of the following hardware.
Table 6-16. SMB0 Configuration
Item
Configuration
Register
SMB shift register 0 (SMB0)
Slave address register 0 (SMBSVA0)
Control register
SMB control register 0 (SMBC0)
SMB status register 0 (SMBS0)
SMB clock selection register 0 (SMBCL0)
SMB mode register 0 (SMBM0)
SMB input level setting register 0 (SMBVI0)
(a) SMB shift register 0 (SMB0)
SMB0 is a register that converts 8-bit serial data to 8-bit parallel data, and vice-versa. SMB0 is used both
for sending and receiving data.
Write and read operations for SMB0 control actual send and receive operations.
SMB0 is manipulated with an 8-bit memory manipulation instruction.
A RESET input clears SMB0 to 00H.
(b) Slave address register 0 (SMBSVA0)
This register is used to set a local address when used as a slave.
SMBSVA0 is manipulated with an 8-bit memory manipulation instruction.
A RESET input clears SMBSVA0 to 00H.
(c) SO latch
The SO latch is a latch that holds the SDA0 pin output level.
(d) Wakeup control circuit
This circuit generates an interrupt request when the address value set in slave address register 0
(SMBSVA0) and the received address match, or when an extension code is received.
(e) Clock selector
Selects the sampling clock to be used.
(f) Serial clock counter
Counts the serial clock output/input during send/receive operations, to check if 8-bit data has been sent or
received.
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