參數(shù)資料
型號(hào): XRT83VSH38
廠商: Exar Corporation
英文描述: 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: 8通道的T1/E1/J1短途線路接口單元
文件頁數(shù): 50/76頁
文件大小: 722K
代理商: XRT83VSH38
XRT83VSH38
47
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.7
6.5
Motorola Mode Programmed I/O Access (Asynchronous)
If the LIU is interfaced to a Motorola type μP, it should be configured to operate in the Motorola mode. Motorola
type programmed I/O Read and Write operations are described below.
Motorola Mode Read Cycle
Whenever a Motorola type μP wishes to read the contents of a register, it should do the following.
1.
Place the address of the target register on the address bus input pins ADDR[7:0].
2.
While the μP is placing this address value on the address bus, the address decoding circuitry should
assert the CS pin of the LIU, by toggling it "Low". This action enables further communication between the
μP and the LIU microprocessor interface block.
3.
The μP should then toggle the AS pin "Low". This step causes the LIU to latch the contents of the address
bus into its internal circuitry. At this point, the address of the register has now been selected.
4.
Next, the μP should indicate that this current bus cycle is a Read operation by pulling the R/W input pin
"High".
5.
Toggle the DS input pin "Low". This action enables the bi-directional data bus output drivers of the LIU.
6.
After the μP toggles the DS signal "Low", the LIU will toggle the DTACK output pin "Low". The LIU does
this in order to inform the μP that the data is available to be read by the μP, and that it is ready for the next
command.
7.
After the μP detects the DTACK signal and has read the data, it can terminate the Read Cycle by toggling
the DS input pin "High".
Motorola Mode Write Cycle
Whenever a motorola type μP wishes to write a byte or word of data into a register within the LIU, it should do
the following.
1.
Place the address of the target register on the address bus input pins ADDR[7:0].
2.
While the μP is placing this address value on the address bus, the address decoding circuitry should
assert the CS pin of the LIU, by toggling it "Low". This action enables further communication between the
μP and the LIU microprocessor interface block.
3.
The μP should then toggle the AS pin "Low". This step causes the LIU to latch the contents of the address
bus into its internal circuitry. At this point, the address of the register has now been selected.
4.
Next, the μP should indicate that this current bus cycle is a Write operation by pulling the R/W input pin
"Low".
5.
Toggle the DS input pin "Low". This action enables the bi-directional data bus output drivers of the LIU.
6.
After the μP toggles the DS signal "Low", the LIU will toggle the DTACK output pin "Low". The LIU does
this in order to inform the μP that the data has been written into the internal register location, and that it is
ready for the next command.
7.
After the μP detects the DTACK signal and has read the data, it can terminate the Read Cycle by toggling
the DS input pin "High".
The Motorola Read and Write timing diagram is shown in
Figure 36
. The timing specifications are shown in
Table 18
.
相關(guān)PDF資料
PDF描述
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