參數(shù)資料
型號(hào): XRT83VSH38
廠商: Exar Corporation
英文描述: 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: 8通道的T1/E1/J1短途線路接口單元
文件頁數(shù): 23/76頁
文件大?。?/td> 722K
代理商: XRT83VSH38
XRT83VSH38
20
REV. 1.0.7
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
3.0
RECEIVE PATH LINE INTERFACE
The receive path of the XRT83VSH38 LIU consists of 8 independent T1/E1/J1 receivers. The following section
describes the complete receive path from RTIP/RRING inputs to RCLK/RPOS/RNEG outputs. A simplified
block diagram of the receive path is shown in
Figure 5
.
F
IGURE
5. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
R
ECEIVE
P
ATH
3.1
Line Termination (RTIP/RRING)
3.1.1
CASE 1: Internal Termination
The input stage of the receive path accepts standard T1/E1/J1 twisted pair or E1 coaxial cable inputs through
RTIP and RRING. The physical interface is optimized by placing the terminating impedance inside the LIU.
This allows one bill of materials for all modes of operation reducing the number of external components
necessary in system design. The receive termination impedance is selected by programming TERSEL[1:0] to
match the line impedance. Selecting the internal impedance is shown in
Table 3
.
The XRT83VSH38 has the ability to switch the internal termination to "High" impedance by programming
RxTSEL in the appropriate channel register. For internal termination, set RxTSEL to "1". By default, RxTSEL
is set to "0" ("High" impedance). For redundancy applications, a dedicated hardware pin (RxTSEL) is also
available to control the receive termination for all channels simultaneously. This hardware pin takes priority
over the register setting if RxTCNTL is set to "1" in the appropriate global register. If RxTCNTL is set to "0", the
state of this pin is ignored. See
Figure 6
for a typical connection diagram using the internal termination.
F
IGURE
6. T
YPICAL
C
ONNECTION
D
IAGRAM
U
SING
I
NTERNAL
T
ERMINATION
T
ABLE
3: S
ELECTING
THE
I
NTERNAL
I
MPEDANCE
TERSEL[1:0]
R
ECEIVE
T
ERMINATION
0h (00)
100
1h (01)
110
2h (10)
75
3h (11)
120
HDB3/B8ZS
Decoder
Rx Jitter
Attenuator
Clock & Data
Recovery
Peak Detector
& Slicer
RTIP
RRING
RCLK
R
TIP
R
RING
XRT83VSH38 LIU
1:1
Internal Impedance
Line Interface T1/E1/J1
One Bill of Materials
Receiver
Input
相關(guān)PDF資料
PDF描述
XRT83VSH38IB 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT84L14 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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