參數(shù)資料
型號: XRT83VSH38
廠商: Exar Corporation
英文描述: 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: 8通道的T1/E1/J1短途線路接口單元
文件頁數(shù): 42/76頁
文件大小: 722K
代理商: XRT83VSH38
XRT83VSH38
39
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.7
6.0
MICROPROCESSOR INTERFACE
The microprocessor interface can be accessed through a standard serial interface (BGA Package Only) or a
standard parallel microprocessor interface. The SER_PAR pin is used to select between the two. By default,
the chip is configured in the Parallel Microprocessor interace. For Serial communication, this pin must be
pulled “High”.
6.1
Serial Microprocessor Interface Block (BGA Package Only)
The serial microprocessor uses a standard 3-pin serial port with CS, SCLK, and SDI for programming the LIU.
Optional pins such as SDO, INT, and RESET allow the ability to read back contents of the registers, monitor
the LIU via an interrupt pin, and reset the LIU to its default configuration by pulling reset "Low" for more than
10
μ
S. A simplified block diagram of the Serial Microprocessor is shown in
Figure 31
.
6.1.1
Serial Timing Information
The serial port requires 24 bits of data applied to the SDI (Serial Data Input) pin. The Serial Microprocessor
samples SDI on the rising edge of SCLK (Serial Clock Input). The data is not latched into the device until all 24
bits of serial data have been sampled. A timing diagram of the Serial Microprocessor is shown in
Figure 32
.
N
OTE
:
For applications without a free running SCLK, a minimum of 1 SCLK pulse must be applied when CS is “High”,
befrore pulling CS “Low”.
F
IGURE
31. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
S
ERIAL
M
ICROPROCESSOR
I
NTERFACE
F
IGURE
32. T
IMING
D
IAGRAM
FOR
THE
S
ERIAL
M
ICROPROCESSOR
I
NTERFACE
Serial
Microprocessor
Interface
CS
SDI
SCLK
SDO
RESET
INT
HW/Host
SER_PAR
R/W
ADDR[0] - ADDR[7]
Don't Care
DATA[0] - DATA[7]
CS
SDI
SCLK
8-Bit Address
8-Bit Data
7-Bit Don't Care
1=Read
0=Write
SDO
DATA[0] - DATA[7]
Readback
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