參數(shù)資料
型號(hào): XRT83VSH316IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA316
封裝: 21 X 21 MM, STBGA-316
文件頁(yè)數(shù): 84/96頁(yè)
文件大?。?/td> 600K
代理商: XRT83VSH316IB
XRT83VSH316
PRELIMINARY
82
16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. P1.0.3
T
ABLE
50: M
ICROPROCESSOR
R
EGISTER
0
X
N07
H
B
IT
D
ESCRIPTION
C
HANNEL
N (0
X
N07
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D[7:0]
Reserved
These Bits are Reserved
RO
0
T
ABLE
51: M
ICROPROCESSOR
R
EGISTER
0
X
N08
H
B
IT
D
ESCRIPTION
C
HANNEL
N (0
X
N08
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used
X
0
D6
D5
D4
D3
D2
D1
D0
1SEG6
1SEG5
1SEG4
1SEG3
1SEG2
1SEG1
1SEG0
Arbitrary Pulse Generation
The transmit output pulse is divided into 8 individual segments.
This register is used to program the first segment which corre-
sponds to the overshoot of the pulse amplitude. There are four
segments for the top portion of the pulse and four segments for the
bottom portion of the pulse. Segment number 5 corresponds to
the undershoot of the pulse. The MSB of each segment is the sign
bit.
Bit 6 = 0 = Negative Direction
Bit 6 = 1 = Positive Direction
R/W
0
0
0
0
0
0
0
T
ABLE
52: M
ICROPROCESSOR
R
EGISTER
0
X
N09
H
B
IT
D
ESCRIPTION
C
HANNEL
N (0
X
N09
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used
X
0
D[6:0]
2SEG[6:0]
Segment Number Two, Same Description as Register 0xN08h
R/W
T
ABLE
53: M
ICROPROCESSOR
R
EGISTER
0
X
N0A
H
B
IT
D
ESCRIPTION
C
HANNEL
N (0
X
N0A
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used
X
0
D[6:0]
3SEG[6:0]
Segment Number Three, Same Description as Register
0xN08h
R/W
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