參數(shù)資料
型號(hào): XRT83VSH316IB
廠商: EXAR CORP
元件分類(lèi): 數(shù)字傳輸電路
英文描述: 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA316
封裝: 21 X 21 MM, STBGA-316
文件頁(yè)數(shù): 51/96頁(yè)
文件大?。?/td> 600K
代理商: XRT83VSH316IB
PRELIMINARY
16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH316
49
REV. P1.0.3
6.0
MICROPROCESSOR INTERFACE
The microprocessor interface can be accessed through a Standard Peripheral Interface (Serial SPI) or
Standard Parallel Microprocessor Interface. By default, the parallel interface is selected. To use the SPI
interface, the SER/PAR pin must be pulled "High".
6.1
SPI Serial Peripheral Interface Block
The serial microprocessor uses a standard 3-pin serial port with CS, SCLK, and SDI for programming the LIU.
Optional pins such as SDO, INT, and RESET allow the ability to read back contents of the registers, monitor
the LIU via an interrupt pin, and reset the LIU to its default configuration by pulling reset "Low" for more than
10
μ
S. A simplified block diagram of the Serial Microprocessor is shown in
Figure 35
.
6.1.1
Serial Timing Information
The serial port requires 24 bits of data applied to the SDI (Serial Data Input) pin. The Serial Microprocessor
samples SDI on the rising edge of SCLK (Serial Clock Input). The data is not latched into the device until all 24
bits of serial data have been sampled. A timing diagram of the Serial Microprocessor is shown in
Figure 36
.
N
OTE
:
For applications without a free running SCLK, a minimum of 1 SCLK pulse must be applied when CS is “High”,
befrore pulling CS “Low”.
F
IGURE
35. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
S
ERIAL
M
ICROPROCESSOR
I
NTERFACE
F
IGURE
36. T
IMING
D
IAGRAM
FOR
THE
S
ERIAL
M
ICROPROCESSOR
I
NTERFACE
Serial
Microprocessor
Interface
CS
SDI
SCLK
SDO
INT
RESET
SER/PAR
R/W
ADDR[0] - ADDR[7]
DATA[0] - DATA[7]
CS
SDI
SCLK
8- Bit Address
8- Bit Data
1=Read
0=Write
SDO
DATA[0] - DATA[7]
Readback
ADDR[8:9], R/W, XXXXX
8- Bit Address
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