參數(shù)資料
型號(hào): XRT83VSH316IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA316
封裝: 21 X 21 MM, STBGA-316
文件頁數(shù): 54/96頁
文件大?。?/td> 600K
代理商: XRT83VSH316IB
XRT83VSH316
PRELIMINARY
52
16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. P1.0.3
6.2
The Parallel Microprocessor Interface section supports communication between the local microprocessor (μP)
and the LIU. The XRT83VSH316 supports an Intel asynchronous interface, Motorola 68K asynchronous,
Power PC, and Motorola MPC8xx interface. The microprocessor interface is selected by the state of the
PTYPE[2:0] input pins. Selecting the microprocessor interface is shown in
Table 15
.
Parallel Microprocessor Interface Block
The XRT83VSH316 uses multipurpose pins to configure the device appropriately. The local μP configures the
LIU by writing data into specific addressable, on-chip Read/Write registers. The microprocessor interface
provides the signals which are required for a general purpose microprocessor to read or write data into these
registers including two general purpose inputs/outputs (GPIO). The microprocessor interface also supports
polled and interrupt driven environments. A simplified block diagram of the microprocessor is shown in
Figure 38
.
T
ABLE
15: S
ELECTING
THE
M
ICROPROCESSOR
I
NTERFACE
M
ODE
PTYPE[2:0]
M
ICROPROCESSOR
M
ODE
0h (000)
Intel 68HC11, 8051, 80C188
(Asynchronous)
1h (001)
Motorola 68K (Asynchronous)
5h (101)
Power PC (Synchronous)
7h (111)
Motorola MPC8260, MPC860
(Synchronous)
F
IGURE
38. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
M
ICROPROCESSOR
I
NTERFACE
B
LOCK
Microprocessor
Interface
WR_R/W
RD_WE
ALE
PTYPE [2:0]
RDY_TA
Reset
PCLK
CS
INT
ADDR[9:0]
DATA[7:0]
CS5
CS4
CS3
CS2
CS1
GPIO2
GPIO1
CSdec[2:0]
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XRT83VSH316IB-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 16 Channel Short-Haul RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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