參數(shù)資料
型號: XRT83VSH28IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA225
封裝: 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225
文件頁數(shù): 65/74頁
文件大?。?/td> 574K
代理商: XRT83VSH28IB
PRELIMINARY
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH28
62
REV. P1.0.0
T
ABLE
35: M
ICROPROCESSOR
R
EGISTER
0
X
81
H
, B
IT
D
ESCRIPTION
R
EGISTER
A
DDRESS
0
X
81
H
N
AME
F
UNCTION
R
EGISTER
T
YPE
R
ESET
V
ALUE
B
IT
#
D7
Reserved
R/W
0
D6
Reserved
R/W
0
D5
Reserved
R/W
0
D4
Reserved
R/W
0
D3
Reserved
R/W
0
D2
RXMUTE
Receive Output Mute:
Writing a “1” to this bit, mutes receive
outputs at RPOS/RDATA and RNEG/LCV pins to a “0” state for
any channel that detects an RLOS condition.
N
OTE
:
RCLK is not muted.
R/W
0
D1
EXLOS
Extended LOS:
Writing a “1” to this bit extends the number of
zeros at the receive input of each channel before RLOS is
declared to 4096 bits. Writing a “0” reverts to the normal mode
(32 bits for E1).
R/W
0
D0
ICT
In-Circuit-Testing:
Writing a “1” to this bit configures all the
output pins of the chip in high impedance mode for In-Circuit-
Testing. Setting the ICT bit to “1” is equivalent to connecting
the
Hardware
ICT pin 88 to ground.
R/W
0
T
ABLE
36: M
ICROPROCESSOR
R
EGISTER
0
X
82
H
B
IT
D
ESCRIPTION
G
LOBAL
R
EGISTER
(0
X
82
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D7
TxONCNTL
Transmit On Control
0 = Control of Transmitter is set ;
if Hardware mode, by TxON pin
if Host mode, by TxON bit
1 = Control of transmitter on, is determined by the individual chan-
nel TxOn bits
R/W
0
D6
TERCNTL
Receive Termination Select Control
This bit sets the LIU to control the RxTSEL function with either the
individual channel register bit or the global hardware pin.
0 = Control of the receive termination is set to the register bits
1 = Control of the receive termination is set to the RxTSEL hard-
ware pin
R/W
0
D[5:0]
Reserved
These Register Bits are Not Used
R/W
0
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