參數(shù)資料
型號: XRT83VSH28IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA225
封裝: 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225
文件頁數(shù): 45/74頁
文件大小: 574K
代理商: XRT83VSH28IB
PRELIMINARY
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH28
42
REV. P1.0.0
5.2
Parallel Microprocessor Interface Block
The Parallel Microprocessor Interface section supports communication between the local microprocessor (μP)
and the LIU. The XRT83VSH28 supports an Intel asynchronous interface, Motorola 68K asynchronous, and an
Intel/Motorola interface. The microprocessor interface is selected by the state of the μPTS[1:0] input pins.
Selecting the microprocessor interface is shown in
Table 10
.
The XRT83VSH28 uses multipurpose pins to configure the device appropriately. The local μP configures the
LIU by writing data into specific addressable, on-chip Read/Write registers. The microprocessor interface
provides the signals which are required for a general purpose microprocessor to read or write data into these
registers. The microprocessor interface also supports polled and interrupt driven environments. A simplified
block diagram of the microprocessor is shown in
Figure 32
.
T
ABLE
10: S
ELECTING
THE
M
ICROPROCESSOR
I
NTERFACE
M
ODE
μ
PTS[1:0]
M
ICROPROCESSOR
M
ODE
0h (00)
Intel 68HC11, 8051, 80C188
(Asynchronous)
1h (01)
Motorola 68K (Asynchronous)
3h (11)
MPC8xx Power PC (Synchronous)
F
IGURE
32. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
M
ICROPROCESSOR
I
NTERFACE
B
LOCK
Microprocessor
Interface
WR_R/W
RD_DS
ALE
μPType [1:0]
RDY
INT
Reset
μPclk
CS
ADDR[7:0]
DATA[7:0]
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參數(shù)描述
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