參數(shù)資料
型號: XRT81L27
廠商: Exar Corporation
英文描述: Seven Channel E1 Line Interface Unit with Clock Recovery(7通道 E1線接口單元(帶時鐘恢復(fù)))
中文描述: 七通道E1線路接口單元的時鐘恢復(fù)(7通道素E1線接口單元(帶時鐘恢復(fù)))
文件頁數(shù): 9/28頁
文件大?。?/td> 140K
代理商: XRT81L27
XRT81L27
SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
PRELIMINARY
REV. P1.0.1
9
73
TVDD6
****
Transmitter 6 Positive Supply (3.3V± 5%)
74
TTIP6
O
TTIP6 O Transmitter 6 Tip Output:
Positive bipolar data output to the line.
75
PDTx6
I
Powered-down Transmitter 6:
This pin is operational for both Host or Hardware mode, tie this pin High to
power-down channel 6 transmitter and set TTIP6 and TRing6 output to high
impedance.
76
RRing6
I
Receiver 6 Bipolar Negative Input:
77
RTIP6
I
Receiver 6 Bipolar Positive Input:
78
AGND
****
Analog Supply Ground
79
RRing4
I
Receiver 4 Bipolar Negative Input:
80
RTIP4
I
Receiver 4 Bipolar Positive Input:
81
AVDD
****
Analog Positive Supply(3.3V± 5%)
82
TGND4
****
Transmitter 4 Supply Ground
83
TRing4
O
Transmitter 4 Ring Output:
Negative bipolar data output to the line.
84
TVDD4
****
Transmitter 4 Positive Supply(3.3V± 5%)
85
TTIP4
O
Transmitter 4 Tip Output:
Positive bipolar data output to the line.
86
PDTx4
I
Powered-down Transmitter 4:
This pin is operational for both Host or Hardware mode, tie this pin High to
power-down channel 4 transmitter and set TTIP4 and TRing4 output to high
impedance. Internally pulled- high with 50K
.
87
TGND2
****
Transmitter 2 Supply Ground.
88
TRing2
O
Transmitter 2 Ring Output:
Negative bipolar data output to the line.
89
TVDD2
****
Transmitter 2 Positive Supply(3.3V± 5%)
90
TTIP2
O
Transmitter 2 Tip Output:
Positive bipolar data output to the line.
91
PDTx2
I
Powered-down Transmitter 2:
This pin is operational for both Host or Hardware mode, tie this pin High to
power-down channel 2 transmitter and set TTIP2 and Tring2 output to high
impedance. Internally pulled-high with 50KW.
92
RRing2
I
Receiver 2 Bipolar Negative Input:
93
RTIP2
I
Receiver 2 Bipolar Positive Input:
94
ICT
I
In-Circuit Testing (Active Low):
When this pin is tied to Low, all output pins are forced to high impedance
state for in-circuit testing. Internally pulled High with 50K
.
95
LOS2
O
Receiver 2 Loss of Signal:
This signal is asserted High to indicate loss of signal at the receive input.
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
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