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參數資料
| 型號： | XRT81L27 |
| 廠商： | Exar Corporation |
| 英文描述： | Seven Channel E1 Line Interface Unit with Clock Recovery(7通道 E1線接口單元（帶時鐘恢復）) |
| 中文描述： | 七通道E1線路接口單元的時鐘恢復（7通道素E1線接口單元（帶時鐘恢復）） |
| 文件頁數： | 17/28頁 |
| 文件大小： | 140K |
| 代理商： | XRT81L27 |
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XRT81L27
SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
PRELIMINARY
REV. P1.0.1
17
T
ABLE
5: R
EGISTER
C
ONTROL
B
IT
D
ESCRIPTION
B
IT
N
O
.
N
AME
F
UNCTION
R
EGISTER
T
YPE
C
OMMAND
C
ONTROL
R
EGISTER
(
COMMON
TO
ALL
SEVEN
CHANNELS
)
A
DDRESS
: 0000
7
Reserved
This bit position is reserved.
R/W
6
ARAOS
Automatic Receive All Ones: Writing a "1" to this bit globally enables
receive all one data insertion at RPOS/RNEG upon receive LOS condi-
tion. The setting of this bit has priority over the "MUTE" function of bit 4.
R/W
5
EXLOS
Extended LOS: Writing a "1" to this bit extends the number of zeros at
the receive input to 4096 bits before LOS is declared.
R/W
4
MUTE
Receive Output Muting: Writing a "1" to this bit mutes the receive data
setting of this bit is only active when AROAS is = "0".
R/W
3
SR/DR
Single-rail/Dual-rail: Writing a "1" to this bit selects single-rail mode
operation for transmit input and receive output. In single-rail mode,
TPOS is the input data for the transmitter and RPOS is the receiver out-
put data. RNEG is the Line Code Violation output pin. Writing a "0" to
select dual-rail mode operation.
R/W
2
CODE
Coding and Decoding: This bit is only active when SR/DR is ="1". With
single-rail mode selected, writing a "1" to this bit selects HDB3 encoding
and decoding , writing a "0" to select AMI encoding and decoding.
R/W
1
RClkP
Receive Clock Polarity: Writing a "1" to this bit selects receive output
data to be updated on the rising edge of RCLK and a "0" to update on
the falling edge of RClk.
R/W
0
TClkP
Transmit Clock Polarity: Writing a "1" to this bit selects input data to be
sampled on the rising edge of TClk and a "0" to sample on the falling
edge of TClk.
R/W
L
OCAL
L
OOP
-B
ACK
R
EGISTERS
A
DDRESS
: 0001
7
reserved
This bit position is reserved.
R/W
0-6
LLB1-LLB7
Local Loop-back: Writing a "1" to this bit enables Local Loop-back for
the channel selected. During Local loop-back, transmit input data con-
tinues to be sent to the line unless overridden by TAOS request.
R/W
R
EMOTE
L
OOP
-
BACK
R
EGISTERS
A
DDRESS
: 0010
7
reserved
This bit position is reserved
R/W
0-6
RLB1-RLB7
Remote Loop-back: Wring a "1" to this bit enables Remote Loop-back
for the channel selected. DuringRemote Loop-back, receive output data
is available at RPOS/RNEG unless overridden by RAOS request.
R/W
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相關代理商/技術參數 |
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| XRT81L27IV | 功能描述:外圍驅動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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| XR-T8205P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telephone Ringer |
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