參數(shù)資料
型號： XRT81L27
廠商： Exar Corporation
英文描述： Seven Channel E1 Line Interface Unit with Clock Recovery(7通道 E1線接口單元（帶時鐘恢復(fù)）)
中文描述： 七通道E1線路接口單元的時鐘恢復(fù)（7通道素E1線接口單元（帶時鐘恢復(fù)））
文件頁數(shù)： 10/28頁
文件大?。?/td> 140K
代理商： XRT81L27
XRT81L27
SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
REV. P1.0.1
PRELIMINARY
10
96
RClk2
O
Receiver 2 Clock Output:
97
RNEG2/LCV2
O
Receiver 2 Negative Data Output:
In dual-rail mode, this signal is the receive n-rail output data.
Line Code Violation Output
:In single-rail mode, this signal output High for one clock cycle to indicate a
code violation is detected in the received data. If AMI coding is selected,
every bipolar violation received will cause this pin to go High.
98
RPOS2/RDATA2
O
Receiver 2 Positive Data Output:
In dual-rail mode, this signal is the receive p-rail output data.
Receiver 2 NRZ Data Output:
In single-rail mode, this signal is the receive output data.
99
LOS4
O
Receiver 4 Loss of Signal:
This signal is asserted High to indicate loss of signal at the receive input.
100
RClk4
O
Receiver 4 Clock Output:
101
RNEG4/LCV4
O
Receiver 4 Negative Data Output:
In dual-rail mode, this signal is the receive n-rail output data.
Line Code Violation Output:
In single-rail mode, this signal output High for one clock cycle to indicate a
code violation is detected in the received data. If AMI coding is selected,
every bipolar violation received will cause this pin to go High.
102
RPOS4/RDATA4
O
Receiver 4 Positive Data Output:
In dual-rail mode, this signal is the receive p-rail output data.
Receiver 4 NRZ Data Output:
In single-rail mode, this signal is the receive output data.
103
AVDD
****
Analog Positive Supply(3.3V± 5%)
104
AGND
****
Analog Supply Ground
105
TClk2
I
Transmitter 2 Clock Input:
E1 rate at 2.048MHz ± 50ppm.
106
TPOS2/TDATA2
I
Transmitter 2 Positive Data Input:
In dual-rail mode, this signal is the p-rail input data for transmitter 2.
Transmitter 2 NRZ Data Input:
In single-rail mode, this signal is used as the NRZ input data for transmitter 2.
107
TNEG2/CODE
I
Transmitter 2 Negative Data Input:
In dual-rail mode, this signal is the n-rail data input for transmitter 2.
See pin 39 description for single-rail mode operation.
Internally pulled-down with 50K
.
108
TAOS2
I
Transmit All Ones:
This pin is set to insert AMI all ones data to the line using MCLK as refer-
ence. In Host Mode, this pin can be left unconnected. Internally pull-down
with 50K
.
109
TClk4
I
Transmitter 4 Clock Input:
E1 rate at 2.048MHz ± 50ppm.
110
TPOS4/TDATA4
I
Transmitter 4 Positive Data Input:
In dual-rail mode, this signal is the p-rail input data for transmitter 4.
Transmitter 4 NRZ Data Input:
In single-rail mode, this signal is used as the NRZ input data for transmitter 4.
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
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