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1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
PRELIMINARY
XRT79L71
REV. P1.0.3
6
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM C
ONTROL
R
EGISTER
- B
YTE
1 (A
DDRESS
= 0
X
1702)
247
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM C
ONTROL
R
EGISTER
- B
YTE
0 (A
DDRESS
= 0
X
1703)
249
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
1707) ...........251
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM I
NTERRUPT
S
TATUS
R
EGISTER
- B
YTE
1 (A
DDRESS
=
0
X
170A)...................................................................................................................................................252
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM I
NTERRUPT
S
TATUS
R
EGISTER
- B
YTE
0 (A
DDRESS
=
0
X
170B)...................................................................................................................................................253
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM I
NTERRUPT
E
NABLE
R
EGISTER
- B
YTE
1 (A
DDRESS
=
0
X
170E)...................................................................................................................................................255
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM I
NTERRUPT
E
NABLE
R
EGISTER
- B
YTE
0 (A
DDRESS
=
0
X
170F) ...................................................................................................................................................256
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM C
ELL
I
NSERTION
/E
XTRACTION
M
EMORY
C
ONTROL
R
EG
-
ISTER
(A
DDRESS
= 0
X
1713) ......................................................................................................................257
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
C
ELL
I
NSERTION
/E
XTRACTION
M
EMORY
D
ATA
- B
YTE
3 (A
D
-
DRESS
= 0
X
1714)......................................................................................................................................260
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
C
ELL
I
NSERTION
/E
XTRACTION
M
EMORY
D
ATA
- B
YTE
2 (A
D
-
DRESS
= 0
X
1715)......................................................................................................................................261
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
C
ELL
I
NSERTION
/E
XTRACTION
M
EMORY
D
ATA
- B
YTE
1 (A
D
-
DRESS
= 0
X
1716)......................................................................................................................................262
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
C
ELL
I
NSERTION
/E
XTRACTION
M
EMORY
D
ATA
- B
YTE
0 (A
D
-
DRESS
= 0
X
1717)......................................................................................................................................263
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- UDF1 B
YTE
V
ALUE
R
EGISTER
(A
DDRESS
= 0
X
1718).................264
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- UDF2 B
YTE
V
ALUE
R
EGISTER
(A
DDRESS
= 0
X
1719).................264
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- UDF3 B
YTE
V
ALUE
R
EGISTER
(A
DDRESS
= 0
X
171A)................265
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- UDF4 B
YTE
V
ALUE
R
EGISTER
(A
DDRESS
= 0
X
171B)................265
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
T
EST
C
ELL
H
EADER
B
YTE
- B
YTE
1 (A
DDRESS
= 0
X
1720).
266
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
T
EST
C
ELL
H
EADER
B
YTE
- B
YTE
2 (A
DDRESS
= 0
X
1721).
266
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
T
EST
C
ELL
H
EADER
B
YTE
- B
YTE
3 (A
DDRESS
= 0
X
1722).
267
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
T
EST
C
ELL
H
EADER
B
YTE
- B
YTE
4 (A
DDRESS
= 0
X
1723).
267
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- T
EST
C
ELL
E
RROR
C
OUNT
R
EGISTERS
- B
YTE
3 (A
DDRESS
= 0
X
1724)
268
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- T
EST
C
ELL
E
RROR
C
OUNT
R
EGISTERS
- B
YTE
2 (A
DDRESS
= 0
X
1725)
269
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- T
EST
C
ELL
E
RROR
C
OUNT
R
EGISTERS
- B
YTE
1 (A
DDRESS
= 0
X
1726)
270
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- T
EST
C
ELL
E
RROR
C
OUNT
R
EGISTERS
- B
YTE
0 (A
DDRESS
= 0
X
1727)
271
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM C
ELL
C
OUNT
R
EGISTER
- B
YTE
3 (A
DDRESS
= 0
X
1728)
272
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM C
ELL
C
OUNT
R
EGISTER
- B
YTE
2 (A
DDRESS
= 0
X
1729)
273
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM C
ELL
C
OUNT
R
EGISTER
- B
YTE
1 (A
DDRESS
= 0
X
172A)
274
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
ATM C
ELL
C
OUNT
R
EGISTER
- B
YTE
0 (A
DDRESS
= 0
X
172B)
275
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
D
ISCARDED
ATM C
ELL
C
OUNT
- B
YTE
3 (A
DDRESS
= 0
X
172C)
276
R
ECEIVE
ATM C
ELL
P
ROCESSOR
B
LOCK
- R
ECEIVE
D
ISCARDED
ATM C
ELL
C
OUNT
- B
YTE
2 (A
DDRESS
= 0
X
172D)
277