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1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
PRELIMINARY
XRT79L71
REV. P1.0.3
125
RXDS3 INTERRUPT STATUS REGISTER (DIRECT ADDRESS = 0X1113)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Detection of
CP Bit Error
Interrupt
Status
Change of
LOS
Condition
Interrupt
Status
Change of
AIS
Condition
Interrupt
Status
Change of
Idle
Condition
Interrupt
Status
Change of
FERF
Condition
Interrupt
Status
Change of
AIC State
Interrupt
Status
Change of
OOF
Condition
Interrupt
Status
Detection of
P-Bit Error
Interrupt
Status
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
B
IT
N
UMBER
N
AME
T
YPE
D
ESCRIPTION
7
Detection of CP Bit Error
Interrupt Status
RUR
Detection of CP-Bit Error Interrupt Status:
This RESET-upon-READ bit-field indicates whether or not the
"Detection of CP-Bit Error" Interrupt has occurred since the last
read of this register.
0 - The "Detection of CP-Bit Error" Interrupt has not occurred
since the last read of this register.
1 - The "Detection of CP-Bit Error" Interrupt has occurred since
the last read of this register.
N
OTE
:
This bit-field is ignored if the Frame Synchronizer block is
by-passed.
6
Change of LOS Condition
Interrupt Status
RUR
Change in LOS Condition Interrupt Status:
This RESET-upon-READ register indicates whether or not the
"Change in LOS Condition" Interrupt has occurred since the last
read of this register.
0 - The "Change in LOS Condition" Interrupt has not occurred
since the last read of this register.
1 - The "Change in LOS Condition" Interrupt has occurred since
the last read of this register.
N
OTE
:
This bit-field is ignored if the Frame Synchronizer block is
by-passed.
5
Change of AIS Condition
Interrupt Status
RUR
Change in AIS Condition Interrupt Status:
This RESET-upon-READ register indicates whether or not the
"Change in LOS Condition" Interrupt has occurred since the last
read of this register.
0 - The "Change in LOS Condition" Interrupt has not occurred
since the last read of this register.
1 - The "Change in LOS Condition" Interrupt has occurred since
the last read of this register.
N
OTE
:
This bit-field is ignored if the Frame Synchronizer block is
by-passed.