FIGURE 6. TIMER OU" />
參數(shù)資料
型號: XR17V352IB113-F
廠商: Exar Corporation
文件頁數(shù): 14/64頁
文件大小: 0K
描述: IC UART PCIE 256B DUAL 113FPBGA
產品培訓模塊: PCIe UARTs
標準包裝: 260
特點: *
通道數(shù): 2,DUART
FIFO's: 256 字節(jié)
規(guī)程: RS485
電源電壓: 3.3V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調制解調器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 113-LFBGA
供應商設備封裝: 113-FPBGA
包裝: 托盤
其它名稱: 1016-1471
XR17V352IB113-F-ND
FIGURE 6. TIMER OUTPUT IN ONE-SHOT AND RE-TRIGGERABLE MODES
TIMER Output in
Re-triggerable
Mode
TIMER Output in
One-Shot Mode
After 'P'
clocks
START TIMER
COMMAND ISSUED
START TIMER
COMMAND ISSUED
'N' Clocks
STOP TIMER
COMMAND ISSUED
START TIMER COMMANDS ISSUED: LESS THAN 'N'
CLOCKS BETWEEN SUCCESSIVE COMMANDS
< 'N' Clocks
After 'P'
clocks
After 'P'
clocks
After 'P'
clocks
After 'P'
clocks
After 'Q'
clocks
After 'Q'
clocks
After 'Q'
clocks
After 'Q'
clocks
< 'N' Clocks
XR17V352
21
REV. 1.0.3
HIGH PERFORMANCE DUAL PCI EXPRESS UART
Timer Interrupt
In the one-shot mode, the Timer will issue an interrupt upon timing out which is ’N’ clocks after the Timer is
started. In the re-triggerable mode, the Timer will keep issuing an interrupt every ’N’ clocks which is on every
rising edge of the Timer output. The Timer interrupt can be cleared by reading the TIMERCNTL register or
when a Timer Reset command is issued which brings the Timer back to its default settings. The TIMERCNTL
will read a value of 0x01 when the Timer interrupt is enabled and there is a pending interrupt. It reads a value
of 0x00 at all other times. Stopping the Timer does not clear the interrupt and neither does subsequent re-
starting.
FIGURE 7. INTERRUPT OUTPUT (ACTIVE LOW) IN ONE-SHOT AND RE-TRIGGERABLE MODES
One-shot Mode
Timer Started
Timer Timed
Out
TIMERCNTL
read
Re-triggerable
Mode
Timer Timed
Out
TIMERCNTL
read
Timer Timed
Out
1.4.3
8XMODE [7:0] (default 0x00)
Each bit selects 8X or 16X sampling rate for that UART channel. The 8XMODE register is accessible from the
Device Configuration Registers in all UART channels but the UART channel can only control the bit for that
channel. For example, bit [0] is for channel 0 and can only be controlled by channel 0. All other bits are read-
only in channel 0. Logic 0 (default) selects normal 16X sampling (and 4XMODE = 0x00) with logic one selects
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