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參數(shù)資料
| 型號(hào)： | XR16L651 |
| 廠商： | Exar Corporation |
| 英文描述： | 2.5V, 3.3V and 5V Low Power UART with 32-Byte FIFO(2.5V, 3.3V和5V 低功耗通用異步接收器/發(fā)送器（帶32字節(jié)先進(jìn)先出）) |
| 中文描述： | 2.5V，3.3V與5V的低功耗的UART與32字節(jié)的FIFO（2.5伏，3.3伏和5V的低功耗通用異步接收器/發(fā)送器（帶32字節(jié)先進(jìn)先出）） |
| 文件頁數(shù)： | 5/46頁 |
| 文件大?。?/td> | 516K |
| 代理商： | XR16L651 |
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XR16L651
2.5V, 3.3 AND 5V LOW POWER UART WITH 32-BYTE FIFO
PRELIMINARY
REV. P1.0.0
5
CTS#
39
I
Clear to Send or general purpose input (active low). If used for automatic
hardware flow control, data transmission will be stopped when this pin is de-
asserted and will resume when this pin is asserted again. See EFR bit-7,
MCR bit-2 and IER bit-7.
DTR#
33
O
Data Terminal Ready or general purpose output (active low).
DSR#
40
I
Data Set Ready input or general purpose input (active low).
CD#
41
I
Carrier Detect input or general purpose input (active low).
RI#
42
I
Ring Indicator input or general purpose input (active low).
ANCILLARY SIGNALS
XTAL1
14
I
Crystal or external clock input.
XTAL2
15
O
Crystal or buffered clock output.
RCLK
5
I
This input is used as external 16X clock input to the receiver section. Connect
the -BAUDOUT pin to this input externally.
BAUDOUT#
12
O
Baud Rate Generator Output (active low). This pin provides the 16X clock of
the selected data rate from the baud rate generator. The RCLK pin must be
connected externally to BAUDOUT# when the receiver is operating at the
same data rate.
When the PC mode is selected, the baud rate generator clock output is inter-
nally connected to the RCLK input. This pin then functions as the LPT-1
printer port decode logic output, see Table 2.
PCMODE#
36
I
PC Mode Select (active low). When this input is at logic 0, it enables the on-
board chip select decode function according to PC ISA bus COM[4:1] and
IRQ[4,3] port definitions. See Table 2 for details. This pin has an internal
100k
pull-up resistor.
DDIS#
22
O
Drive Disable Output. This pin goes to a logic 0 whenever the host CPU is
reading data from the 651. It can control the direction of a data bus trans-
ceiver between the CPU and 651 or other logic functions.
ENIR
13
I
Enable Infrared Mode (active high). This pin can be used to start up the UART
in wireless infrared mode upon power up or a reset. The TX output would idle
at logic 0 instead of normal logic 1. The software infrared enable bit (MCR bit-
6) will have full enable/disable control after the power up.
RESET
(RESET#)
35
I
Reset Input. When it is asserted, the UART configuration registers are reset
to default values, see Table 13. When IM# pin is at a logic 0, Intel bus mode,
reset input is active high. When IM# pin is at a logic 1, Motorola bus mode,
reset input is active low.
IM#
37
I
Intel or Motorola data bus interface select. A logic 0 selects Intel bus interface
and a logic 1 selects Motorola interface. This input affects the functionality of
IOR#, IOW#, CS# and INT pins.
OP1#
34
O
Output Port 1. General purpose output.
OP2#
331
O
Output Port 2. General purpose output.
VCC
43
2.5V, 3.3V or 5V.
GND
18
Power supply common ground.
NC
1,25
No Connect. Conenct to VCC or GND to minimize noise.
N
AME
P
IN
#
T
YPE
D
ESCRIPTION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16L651CM | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V UART WITH 32-BYTE FIFO |
| XR16L651CM-0A-EVB | 功能描述:UART 接口集成電路 Supports L651 48 ld TQFP, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16L651CM-F | 功能描述:UART 接口集成電路 UARTW/32BYTEFIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16L651CMTR-F | 制造商:Exar Corporation 功能描述:UART 1-CH 32Byte FIFO 2.5V/3.3V/5V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR16L651CMTR-F |
| XR16L651IM | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
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