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參數(shù)資料
| 型號： | XR16L651 |
| 廠商： | Exar Corporation |
| 英文描述： | 2.5V, 3.3V and 5V Low Power UART with 32-Byte FIFO(2.5V, 3.3V和5V 低功耗通用異步接收器/發(fā)送器（帶32字節(jié)先進(jìn)先出）) |
| 中文描述： | 2.5V，3.3V與5V的低功耗的UART與32字節(jié)的FIFO（2.5伏，3.3伏和5V的低功耗通用異步接收器/發(fā)送器（帶32字節(jié)先進(jìn)先出）） |
| 文件頁數(shù)： | 25/46頁 |
| 文件大小： | 516K |
| 代理商： | XR16L651 |
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á
XR16L651
2.5V, 3.3 AND 5V LOW POWER UART WITH 32-BYTE FIFO
PRELIMINARY
REV. P1.0.0
25
Logic 1 = Reset the transmit FIFO pointers and FIFO
level counter logic (the transmit shift register is not
cleared or altered). This bit will return to a logic 0 after
resetting the FIFO.
FCR[3]: DMA Mode Select
Controls the behavior of the -TXRDY and -RXRDY
pins. See DMA operation section for details.
Logic 0 = Set DMA to mode 0. (default)
Logic 1 = Set DMA to mode 1.
FCR[5:4]: Transmit FIFO Trigger Select
(logic 0 = default, TX trigger level = one)
These 2 bits set the trigger level for the transmit FIFO
interrupt. The UART will issue a transmit interrupt
when the number of characters in the FIFO falls be-
low the selected trigger level, or when it gets empty in
case that the FIFO did not get filled over the trigger
level on last re-load. Table 10
below shows the selec-
tions. EFR bit-4 must be set to ‘1’ before these bits
can be accessed.
FCR[7:6]: Receive FIFO Trigger Select
(logic 0 = default, RX trigger level =1).
The FCTR Bits 6-7 are associated with these 2 bits.
These 2 bits are used to set the trigger level for the
receiver FIFO interrupt. Table 10 shows the complete
selections.
.
6.6
The Line Control Register is used to specify the asyn-
chronous data communication format. The word or
character length, the number of stop bits, and the par-
ity are selected by writing the appropriate bits in this
register.
LCR[1-0]: TX and RX Word Length Select
These two bits specify the word length to be transmit-
ted or received.
L
INE
C
ONTROL
R
EGISTER
(LCR)
T
ABLE
10: T
RANSMIT
AND
R
ECEIVE
FIFO T
RIGGER
L
EVEL
S
ELECTION
WITH
AUTO
RTS
HYSTERESIS
FCR
B
IT
-7
FCR
B
IT
-6
FCR
B
IT
-5
FCR
BIT
-4
T
RANSMIT
INT
T
RIGGER
L
EVEL
R
ECEIVE
INT
T
RIGGER
L
EVEL
A
UTO
RTS
D
E
-
ASSERT
A
UTO
RTS
R
E
-
ASSERT
C
OMPATIBILITY
0
0
1
1
0
1
0
1
0
0
1
1
0
1
0
1
16
8
24
30
8
16
24
28
16
24
28
28
0
8
16
24
16C650A compati-
ble.
BIT-1
BIT-0
W
ORD
LENGTH
0
0
5 (default)
0
1
6
1
0
7
1
1
8
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16L651CM | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V UART WITH 32-BYTE FIFO |
| XR16L651CM-0A-EVB | 功能描述:UART 接口集成電路 Supports L651 48 ld TQFP, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16L651CM-F | 功能描述:UART 接口集成電路 UARTW/32BYTEFIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16L651CMTR-F | 制造商:Exar Corporation 功能描述:UART 1-CH 32Byte FIFO 2.5V/3.3V/5V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR16L651CMTR-F |
| XR16L651IM | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
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