參數(shù)資料
型號: XR16C864
廠商: Exar Corporation
元件分類: 通用總線功能
英文描述: Quad UART with RX/TX FIFO Counters and 128-byte FIFO(四通用異步接收器/發(fā)送器(帶RX/TX 先進先出計數(shù)器和128字節(jié)先進先出))
中文描述: 四路與異步接收/發(fā)送FIFO的計數(shù)器和128字節(jié)的FIFO(四通用異步接收器/發(fā)送器(帶了Rx / Tx先進先出計數(shù)器和128字節(jié)先進先出))
文件頁數(shù): 32/46頁
文件大?。?/td> 381K
代理商: XR16C864
XR16C864
32
Rev. 1.10
FEATURE CONTROL REGISTER
This register controls the XR16C864 new functions that
are not available on ST16C550 or ST16C650.
FCTR BIT 0-1:
User selectable -RTS delay (hysteresis level) for hard-
ware flow control application, when programmable trig-
ger levels are chosen (FCTR bits 5 & 4 are both "1").
After reset, these bits are set to “0”. In the table below,
TRG indicates the programmed trigger level.
EMSR
Bits 5,4 Bits 1,0
FCTR
-RTS Switch Points*
0 0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
TRG +/- 0
TRG +/- 4
TRG +/- 6
TRG +/- 8
TRG +/- 8
TRG +/- 16
TRG +/- 24
TRG +/- 32
TRG +/- 12
TRG +/- 20
TRG +/- 28
TRG +/- 36
TRG +/- 40
TRG +/- 44
TRG +/- 48
TRG +/- 52
0 1
1 1
1 0
* the switch point cannot be <1 or > 128.
FCTR BIT-2:
0 = Select RX input as encoded IrDa data.
1 = Select RX input as active high encoded IrDa data.
FCTR BIT-3:
Interrupt type select and Auto RS-485 Direction control.
0 = Standard ST16C550 mode. Transmitter generates
interrupt when transmit holding register is empty and
transmit shift register is shifting data out.
1 = Transmit empty interrupt. Transmit interrupt is
generated when transmitter holding and shift register
is empty. The OP2* output pin will stay high during
receive mode and will go low during transmit mode.
FCTR BIT 4-5:
Transmit / receive trigger table select.
FCTR
Bit-5
FCTR
Bit-4
Table
0
0
1
1
0
1
0
1
Table-A (TX/RX)
Table-B (TX/RX)
Table-C (TX/RX)
Table-D (TX/RX)
FCTR BIT-6:
Register mode select.
0 = Scratch Pad register is selected as general read and
write register. ST16C550 compatible mode.
1 = FIFO count register, Enhanced Mode Select
Register. Number of characters in transmit or receive
holding register can be read via scratch pad register
when this bit is set. (See Table 7).
FCTR BIT-7:
Programmable trigger register select.
0 = Receiver programmable trigger level register is
selected.
1 = Transmitter programmable trigger level register is
selected. (See Table 7).
TRIGGER LEVEL / FIFO DATA COUNT REGISTER
User programmable transmit / receive trigger level
register. See Table 7.
TRG BIT 0-7: Write only.
these bits are used to programmed desire trigger
levels that are not available in standard tables.
TRG BIT 0-7: Read only.
Transmit / receive FIFO count. Number of characters
in transmit or receive FIFO can be read via this register.
ENHANCED MODE SELECT REGISTER
This register is accessible only when FCTR Bit-6 is set
to “1”.
EMSR BIT-0: “Write only”
0 = Receive FIFO count register. The scratch pad
register is used to provide the receive FIFO count when
it is read.
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