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參數(shù)資料
| 型號： | XC866L-4RR |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁數(shù)： | 56/108頁 |
| 文件大?。?/td> | 979K |
| 代理商： | XC866L-4RR |
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XC866
Functional Description
Data Sheet
52
V1.0, 2006-02
3.8
Clock Generation Unit
The Clock Generation Unit (CGU) allows great flexibility in the clock generation for the
XC866. The power consumption is indirectly proportional to the frequency, whereas the
performance of the microcontroller is directly proportional to the frequency. During user
program execution, the frequency can be programmed for an optimal ratio between
performance and power consumption. Therefore the power consumption can be
adapted to the actual application state.
Features:
Phase-Locked Loop (PLL) for multiplying clock source by different factors
PLL Base Mode
Prescaler Mode
PLL Mode
Power-down mode support
The CGU consists of an oscillator circuit and a PLL.In the XC866, the oscillator can be
from either of these two sources: the on-chip oscillator (10 MHz) or the external oscillator
(3 MHz to 12 MHz). The term “oscillator” is used to refer to both on-chip oscillator and
external oscillator, unless otherwise stated. After the reset, the on-chip oscillator will be
used by default.The external oscillator can be selected via software. In addition, the PLL
provides a fail-safe logic to perform oscillator run and loss-of-lock detection. This allows
emergency routines to be executed for system recovery or to perform system shut down.
Figure 22
CGU Block Diagram
PLL
core
lock
detect
N:1
P:1
fvco
fn
fp
osc fail
detect
OSC
fosc
K:1
fsys
NDIV
OSCDISC
OSCR
LOCK
VCOBYP
PLLBYP
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