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參數(shù)資料
| 型號： | XC866L-4RR |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁數(shù)： | 18/108頁 |
| 文件大?。?/td> | 979K |
| 代理商： | XC866L-4RR |
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XC866
Functional Description
Data Sheet
14
V1.0, 2006-02
3.2.1
Memory Protection Strategy
The XC866 memory protection strategy includes:
Read-out protection: The user is able to protect the contents in the Flash (for Flash
devices) and ROM (for ROM devices) memory from being read
Flash program and erase protection (for Flash devices only)
Flash memory protection modes are available only for Flash devices:
Mode 0: Only the P-Flash is protected; the D-Flash is unprotected
Mode 1: Both the P-Flash and D-Flash are protected
The selection of each protection mode and the restrictions imposed are summarized in
Table 3
.
BSL mode 6, which is used for enabling Flash protection, can also be used for disabling
Flash protection. Here, the programmed password must be provided by the user. A
password match triggers an automatic erase of the protected P-Flash and D-Flash
contents, including the programmed password. The Flash protection is then disabled
upon the next reset.
Although no protection scheme can be considered infallible, the XC866 memory
protection strategy provides a very high level of protection for a general purpose
microcontroller.
Note: If ROM read-out protection is enabled, only read instructions in the ROM memory
can target the ROM contents.
Table 3
Flash Protection Modes
Mode
Activation
Selection
P-Flash contents
can be read by
P-Flash program
and erase
D-Flash contents
can be read by
D-Flash program
Possible
D-Flash erase
0
Program a valid password via BSL mode 6
MSB of password = 0
Read instructions in the
P-Flash
Not possible
1
MSB of password = 1
Read instructions in the
P-Flash or D-Flash
Not possible
Read instructions in any program
memory
Read instructions in the
P-Flash or D-Flash
Not possible
Not possible
Possible, on the condition that bit
DFLASHEN in register MISC_CON
is set to 1 prior to each erase
operation
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