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參數(shù)資料
| 型號(hào)： | XC866L-4RR |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁(yè)數(shù)： | 55/108頁(yè) |
| 文件大?。?/td> | 979K |
| 代理商： | XC866L-4RR |
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XC866
Functional Description
Data Sheet
51
V1.0, 2006-02
3.7.1
Module Reset Behavior
Table 16
shows how the functions of the XC866 are affected by the various reset types.
A “ ” means that this function is reset to its default state.
3.7.2
Booting Scheme
When the XC866 is reset, it must identify the type of configuration with which to start the
different modes once the reset sequence is complete. Thus, boot configuration
information that is required for activation of special modes and conditions needs to be
applied by the external world through input pins. After power-on reset or hardware reset,
the pins MBC, TMS and P0.0 collectively select the different boot options.
Table 17
shows the available boot options in the XC866.
Table 16
Effect of Reset on Device Functions
Module/
Function
CPU Core
Peripherals
On-Chip
Static RAM
Oscillator,
PLL
Port Pins
EVR
Wake-Up
Reset
Watchdog
Reset
Hardware
Reset
Power-On
Reset
Brownout
Reset
Not affected,
reliable
Not affected,
reliable
Not affected
Not affected,
reliable
Affected, un-
reliable
Affected, un-
reliable
The voltage
regulator is
switched on
Not affected
FLASH
NMI
Disabled
Disabled
Table 17
XC866 Boot Selection
MBC
1
0
0
TMS
0
0
1
P0.0
x
x
0
Type of Mode
User Mode; on-chip OSC/PLL non-bypassed 0000
H
BSL Mode; on-chip OSC/PLL non-bypassed
OCDS Mode; on-chip OSC/PLL non-
bypassed
Standalone User (JTAG) Mode
1)
; on-chip
OSC/PLL non-bypassed (normal)
1)
Normal user mode with standard JTAG (TCK,TDI,TDO) pins for hot-attach purpose.
PC Start Value
0000
H
0000
H
1
1
0
0000
H
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