- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄245661 > W986432EH-7 (WINBOND ELECTRONICS CORP) 2M X 32 SYNCHRONOUS DRAM, 5.5 ns, PDSO86 PDF資料下載
參數(shù)資料
| 型號： | W986432EH-7 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 2M X 32 SYNCHRONOUS DRAM, 5.5 ns, PDSO86 |
| 封裝： | 0.400 INCH, TSOP2-86 |
| 文件頁數(shù)： | 10/48頁 |
| 文件大?。?/td> | 1180K |
| 代理商： | W986432EH-7 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當(dāng)前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
W986432EH / W9864G2EH
- 18 -
1. Transition times are measured between VIH and VIL.
2. tHZ defines the time at which the outputs achieve the open circuit condition and is not
referenced to output level.
3. These parameters account for the number of clock cycles and depend on the operating
frequency of the clock, as follows the number of clock cycles = specified value of timing/
clock period (count fractions as whole number)
(1) tCH is the pulse width of CLK measured from the positive edge to the negative edge
referenced to VIH (min.).
tCL is the pulse width of CLK measured from the negative edge to the positive edge
referenced to VIL (max.).A.C Latency Characteristics
CKE to clock disable (CKE Latency)
1
tCK
DQM to output to HI-Z (Read DQM Latency)
2
DQM to output to HI-Z (Write DQM Latency)
0
Write command to input data (Write Data Latency)
0
CS
to Command input ( CS Latency)
0
Precharge to DQ Hi-Z Lead time
CL = 2
2
CL = 3
3
Precharge to Last Valid data out
CL = 2
1
CL = 3
2
Bust Stop Command to DQ Hi-Z Lead time
CL = 2
2
CL = 3
3
Bust Stop Command to Last Valid Data out
CL = 2
1
CL = 3
2
Read with Auto-precharge Command to Active/Ref
Command
CL = 2
BL + tRP
tCK + nS
CL = 3
BL + tRP
Write with Auto-precharge Command to Active/Ref
Command
CL = 2
(BL+1) + tRP
CL = 3
(BL+1) + tRP
7. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
( The tT maximum can’t be more than 10nS for low frequency application. )
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W25X40-VSSI-G | 4M X 1 FLASH 2.7V PROM, PDSO8 |
| WF2M16W-90DAI5A | 2M X 16 FLASH 5V PROM MODULE, 90 ns, CDSO56 |
| WF2M16W-120DLM5A | 2M X 16 FLASH 5V PROM MODULE, 120 ns, CDSO44 |
| WF2M16W-90DAM5A | 2M X 16 FLASH 5V PROM MODULE, 90 ns, CDSO56 |
| WF2M16W-120DAC5A | 2M X 16 FLASH 5V PROM MODULE, 120 ns, CDSO56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W9864G2DH6 | 制造商:WINBOND 功能描述:New |
| W9864G2GH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K X 4 BANKS X 32BITS SDRAM |
| W9864G2GH-5 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K X 4 BANKS X 32BITS SDRAM |
| W9864G2GH-6 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K X 4 BANKS X 32BITS SDRAM |
| W9864G2GH-6C | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K X 4 BANKS X 32BITS SDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。