W83627UHG
7.2.2 I
2C Interface
The I
2C interface is a second, parallel port into the internal registers of the hardware monitor function
block. The interface is totally compatible with the industry-standard I
2C specification, allowing external
components that are also compatible to read the internal registers of the W83627UHG hardware
monitor and control fan speeds. The address of the I
2C peripheral is set by the register located at
index 48h (which is accessed by the index/data pair at I/O address typically at 295h/296h).
The two timing diagrams below illustrate how to use the I
2C interface to write to an internal register
and how to read the value in an internal register, respectively.
(a) Serial bus write to internal address register followed by the data byte
0
Start By
Master
01
1
01
D7
D6
D5
D4
D3
D2
D1
D0
Ack
by
627UHG
R/W
Ack
by
627UHG
SCL
SDA
D7
D6
D5
D4
D3
D2
D1
D0
Ack
by
784R
Stop
by
Master
SCL
SDA (Continued)
78
0
78
0
78
Frame 2
Internal Index Register Byte
(Continued)
Frame 3
Data Byte
Frame 1
Serial Bus Address Byte
Ack
by
627UHG
Figure 7-2 Serial Bus Write to Internal Address Register Followed by the Data Byte
Publication Release Date: March 24, 2008
-24-
Revision 1.44