- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄203625 > W28F321TB70L (WINBOND ELECTRONICS CORP) 2M X 16 FLASH 1.8V PROM, 70 ns, PBGA48 PDF資料下載
參數(shù)資料
| 型號(hào)： | W28F321TB70L |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 2M X 16 FLASH 1.8V PROM, 70 ns, PBGA48 |
| 封裝： | 7 X 7 MM, 0.75 MM PITCH, TFBGA-48 |
| 文件頁數(shù)： | 22/28頁 |
| 文件大?。?/td> | 372K |
| 代理商： | W28F321TB70L |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當(dāng)前第22頁第23頁第24頁第25頁第26頁第27頁第28頁
W28F321BB/TB
Publication Release Date: February 17, 2003
- 3 -
Revision A2
Table 1. Pin Descriptions
SYMBOL
TYPE
NAME AND FUNCTION
A0
A20
INPUT
ADDRESS INPUTS: Inputs for addresses. 32M: A0
A20.
DQ0
DQ15
INPUT/
OUTPUT
DATA INPUT/OUTPUTS: Inputs data and commands during CUI (Command User
Interface) write cycles, outputs data during memory array, status register, query code,
identifier code and partition configuration register code reads. Data pins float to high
impedance (High Z) when the chip or outputs are deselected. Data is internally
latched during an erase or program cycle.
#CE
INPUT
CHIP ENABLE: Activates the device’s control logic, input buffers, decoders and
sense amplifiers. #CE-high (VIH) deselects the device and reduces power
consumption to standby levels.
#RESET
INPUT
RESET: When low (VIL), #RESET resets internal automation and inhibits write
operations, which provides data protection. #RESET-high (VIH) enables normal
operation. After power-up or reset mode, the device is automatically set to read array
mode. #RESET must be low during power-up/down.
#OE
INPUT
OUTPUT ENABLE: Gates the device’s outputs during a read cycle.
#WE
INPUT
WRITE ENABLE: Controls writes to the CUI and array blocks. Addresses and data
are latched on the rising edge of #CE or #WE (whichever goes high first).
#WP
INPUT
WRITE PROTECT: When #WP is VIL, locked-down blocks cannot be unlocked. Erase
or program operation can be executed to the blocks which are not locked and locked-
down. When #WP is VIH, lock-down is disabled.
VPP
INPUT
MONITORING POWER SUPPLY VOLTAGE: VPP is not used for power supply pin.
With VPP ≤ VPPLK, block erase, full chip erase, (page buffer) program or OTP program
cannot be executed and should not be attempted.
Applying 12V±0.3V to VPP provides fast erasing or fast programming mode. In this
mode, VPP is power supply pin. Applying 12V±0.3V to VPP during erase/program can
only be done for a maximum of 1,000 cycles on each block. VPP may be connected to
12V±0.3V for a total of 80 hours maximum. Use of this pin at 12V beyond these limits
may reduce block cycling capability or cause permanent damage.
VDD
SUPPLY
DEVICE POWER SUPPLY (2.7V to 3.6V): With VDD ≤ VLKO, all write attempts to the
flash memory are inhibited. Device operations at invalid VDD voltage (see DC
Characteristics) produce spurious results and should not be attempted.
VDDQ
SUPPLY
INPUT/OUTPUT POWER SUPPLY (2.7V to 3.6V): Power supply for all input/output
pins.
VSS
SUPPLY
GROUND: Do not float any ground pins.
NC
NO CONNECT: Lead is not internally connected; it may be driven or floated.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W29C010-70 | 128K X 8 FLASH 5V PROM, 70 ns, PDIP32 |
| W29C010-45 | 128K X 8 FLASH 5V PROM, 45 ns, PDIP32 |
| W29C020C-90Z | 256K X 8 FLASH 5V PROM, 90 ns, PDIP32 |
| W29D040C-55C | 512K X 8 FLASH 5V PROM, 55 ns, PDIP32 |
| W29D040CT55C | 512K X 8 FLASH 5V PROM, 55 ns, PDSO32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W28F641B | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64MBIT (4MBIT × 16) PAGE MODE DUAL WORK FLASH MEMORY |
| W28F641BB80L | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64MBIT (4MBIT × 16) PAGE MODE DUAL WORK FLASH MEMORY |
| W28F641BT80L | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64MBIT (4MBIT × 16) PAGE MODE DUAL WORK FLASH MEMORY |
| W28F641TB80L | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64MBIT (4MBIT × 16) PAGE MODE DUAL WORK FLASH MEMORY |
| W28F641TT80L | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64MBIT (4MBIT × 16) PAGE MODE DUAL WORK FLASH MEMORY |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。