
W28F321BB/TB
Publication Release Date: February 17, 2003
- 21 -
Revision A2
AC Characteristics - Write Operations(1,2)
VDD = 2.7V to 3.6V, TA = -40°C to +85°C
PARAMETER
SYM.
MIN.
MAX.
UNIT
Write Cycle Time
tAVAV
70
nS
#RESET High Recovery to #WE(#CE) Going Low (note 3)
tPHWL(tPHEL)
150
nS
#CE(#WE) Setup to #WE(#CE) Going Low (note 4)
tELWL(tWLEL)
0
nS
#WE(#CE) Pulse Width (note 4)
tWLWH(tELEH)
60
nS
Data Setup to #WE(#CE) Going High (note 8)
tDVWH(tDVEH)
40
nS
Address Setup to #WE(#CE) Going High (note 8)
tAVWH(tAVEH)
50
nS
#CE(#WE) Hold from #WE(#CE) High
tWHEH(tEHWH)
0
nS
Data Hold from #WE(#CE) High
tWHDX(tEHDX)
0
nS
Address Hold from #WE(#CE) High
tWHAX(tEHAX)
0
nS
#WE(#CE) Pulse Width High (note 5)
tWHWL(tEHEL)
30
nS
#WP High Setup to #WE(#CE) Going High (note 3)
tSHWH(tSHEH)
0
nS
VPP Setup to #WE(#CE) Going High (note 3)
tVVWH(tVVEH)
200
nS
Write Recovery before Read
tWHGL(tEHGL)
30
nS
#WP High Hold from Valid SRD (note 3, 6)
tQVSL
0
nS
VPP Hold from Valid SRD (note 3, 6)
tQVVL
0
nS
#WE(#CE) High to SR.7 Going "0" (note 3, 7)
tWHR0(tEHR0)
tAVQV+40
nS
Notes:
1. The timing characteristics for reading the status register during block erase, full chip erase, (page buffer) program and OTP
program operations are the same as during read-only operations. Refer to AC Characteristics for read-only operations.
2. A write operation can be initiated and terminated with either #CE or #WE.
3. Sampled, not 100% tested.
4. Write pulse width (tWP) is defined from the falling edge of #CE or #WE (whichever goes low last) to the rising edge of #CE or
#WE (whichever goes high first). Hence, tWP = tWLWH = tELEH = tWLEH = tELWH.
5. Write pulse width high (tWPH) is defined from the rising edge of #CE or #WE (whichever goes high first) to the falling edge of
#CE or #WE (whichever goes low last). Hence, tWPH = tWHWL = tEHEL = tWHEL = tEHWL.
6. VPP should be held at VPP = VPPH1/2 until determination of block erase, (page buffer) program or OTP program success
(SR.1/3/4/5 = 0) and held at VPP = VPPH1 until determination of full chip erase success (SR.1/3/5 = 0).
7. tWHR0 (tEHR0) after the Read Query or Read Identifier Codes/OTP command=tAVQV+100ns.
8. Refer to Table 6 for valid address and data for block erase, full chip erase, (page buffer) program, OTP program or lock bit
configuration.