參數(shù)資料
型號： UPD754304GS-XXX-A
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER, PDSO36
封裝： 0.300 INCH, 0.80 MM PITCH, PLASTIC, SSOP-36
文件頁數(shù)： 2/73頁
文件大?。?/td> 814K
代理商： UPD754304GS-XXX-A
PD754302, 754304, 754302(A), 754304(A)
10
Data Sheet U10797EJ2V1DS
3.2 Non-port Pins
Pin Name
Input/Output
Alternate
Function
After Reset
I/O Circuit
Function
TYPE Note
TI0/TI1
Input
P13
Inputs external event pulses to the timer/event
Input
B -C
counter.
PTO0
Output
P20
Timer/event counter output
Input
E-B
PTO1
P21
PCL
P22
Clock output
SCK
Input/Output
P01
Serial clock input/output
Input
F -A
SO/SB0
P02
Serial data output
F -B
Serial data bus input/output
SI
Input
P03
Serial data input
B -C
INT4
Input
P00
Edge detection vectored interrupt input (both
Input
B
rising edge and falling edge detection)
INT0
Input
P10
Input
B -C
INT1
P11
INT2
Input
P12
Input
B -C
KR0-KR3
Input
P60-P63
Testable input (falling edge detection)
Input
F -A
KR4-KR7
P70-P73
X1
Input
–
Crystal/ceramic connection pin for the system
–
clock oscillator. When inputting the external
clock, input the external clock to pin X1, and
X2
–
the inverted phase of the external clock to
pin X2.
RESET
Input
–
System reset input (low-level active)
–
B
IC
–
Internally connected. Connect directly to VDD.–
–
VDD
––
Positive power supply
–
VSS
––
Ground potential
–
Note
Circled characters indicate the Schmitt-trigger input.
Edge detection vectored
Asynchronous with
interrupt input (detection
noise elimination
edge can be selected).
circuit can be selected
INT0/P10 can select a
noise elimination circuit.
Asynchronous
Edge detection testable
Asynchronous
input
(rising edge detection)
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