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參數(shù)資料
| 型號(hào)： | UPD45128163G5-A10LT-9JF |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range) |
| 中文描述： | 8M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO54 |
| 封裝： | PLASTIC, TSOP2-54 |
| 文件頁(yè)數(shù)： | 9/86頁(yè) |
| 文件大?。?/td> | 774K |
| 代理商： | UPD45128163G5-A10LT-9JF |
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Data Sheet E0348N10 (Ver. 1.0)
9
μ
PD45128163-T
2. Commands
Mode register set command
(/CS, /RAS, /CAS, /WE = Low)
The
μ
PD45128xxx has a mode register that defines how the device
operates. In this command, A0 through A11, BA0(A13) and BA1(A12)
are the data input pins. After power on, the mode register set
command must be executed to initialize the device.
The mode register can be set only when all banks are in idle state.
During 2 CLK (t
RSC
) following this command, the
μ
PD45128xxx
cannot accept any other commands.
Fig.1 Mode register set command
CLK
/WE
/CAS
/RAS
/CS
CKE
H
Add
A10
BA0(A13), BA1(A12)
Activate command
(/CS, /RAS = Low, /CAS, /WE = High)
The
μ
PD45128xxx has four banks, each with 4,096 rows.
This command activates the bank selected by BA0(A13) and
BA1(A12) and a row address selected by A0 through A11.
This command corresponds to a conventional DRAM’s /RAS falling.
Fig.2 Row address strobe and
bank activate command
/WE
/CAS
/RAS
/CS
CKE
CLK
H
Add
A10
BA0(A13), BA1(A12)
Row
Row
Precharge command
(/CS, /RAS, /WE = Low, /CAS = High)
This command begins precharge operation of the bank selected by
BA0(A13) and BA1(A12). When A10 is High, all banks are
precharged, regardless of BA0(A13) and BA1(A12). When A10 is
Low, only the bank selected by BA0(A13) and BA1(A12) is
precharged.
After this command, the
μ
PD45128xxx can’t accept the activate
command to the precharging bank during t
RP
(precharge to activate
command period).
This command corresponds to a conventional DRAM’s /RAS rising.
Fig.3 Precharge command
CLK
/WE
/CAS
/RAS
/CS
CKE
H
Add
A10
BA0(A13), BA1(A12)
(Precharge select)
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PDF描述 |
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| UPD45128163G5-A80-9JF | 128M-bit Synchronous DRAM 4-bank, LVTTL |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD45128163G5-A75-9JF | 制造商:Elpida Memory Inc 功能描述:8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| UPD45128841G5-A75-9JF | 制造商:NEC Electronics Corporation 功能描述:SDRAM, 16M x 8, 54 Pin, Plastic, TSOP |
| UPD4516161AG5A109NF | 制造商:NEC Electronics Corporation 功能描述: |
| UPD4516161AG5-A10-9NF | 制造商:NEC Electronics Corporation 功能描述:SDRAM, 1M x 16, 50 Pin, Plastic, TSOP |
| UPD4528BC | 制造商:Panasonic Industrial Company 功能描述:IC |
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