參數(shù)資料
型號(hào)： UPD45128163G5-A10LT-9JF
廠商： ELPIDA MEMORY INC
元件分類： DRAM
英文描述： 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
中文描述： 8M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO54
封裝： PLASTIC, TSOP2-54
文件頁(yè)數(shù)： 17/86頁(yè)
文件大?。?/td> 774K
代理商： UPD45128163G5-A10LT-9JF
Data Sheet E0348N10 (Ver. 1.0)
17
μ
PD45128163-T
4.5 Command Truth Table for CKE
Current State
CKE
/CS /RAS /CAS /WE
Address
Action
Notes
n – 1
n
Self refresh
H
×
×
×
×
×
×
INVALID, CLK (n – 1) would exit self refresh
L
H
H
×
×
×
×
Self refresh recovery
L
H
L
H
H
×
×
Self refresh recovery
L
H
L
H
L
×
×
ILLEGAL
L
H
L
L
×
×
×
ILLEGAL
L
L
×
×
×
×
×
Maintain self refresh
Self refresh recovery
H
H
H
×
×
×
×
Idle after t
RC
H
H
L
H
H
×
×
Idle after t
RC
H
H
L
H
L
×
×
ILLEGAL
H
H
L
L
×
×
×
ILLEGAL
H
L
H
×
×
×
×
ILLEGAL
H
L
L
H
H
×
×
ILLEGAL
H
L
L
H
L
×
×
ILLEGAL
H
L
L
L
×
×
×
ILLEGAL
Power down
H
×
×
×
×
×
INVALID, CLK (n – 1) would exit power down
L
H
H
×
×
×
×
EXIT power down
→
Idle
L
H
L
H
H
H
×
EXIT power down
→
Idle
L
L
×
×
×
×
×
Maintain power down mode
All banks idle
H
H
H
×
×
×
Refer to operations in Operative Command Table
H
H
L
H
×
×
Refer to operations in Operative Command Table
H
H
L
L
H
×
Refer to operations in Operative Command Table
H
H
L
L
L
H
×
CBR (auto) Refresh
H
H
L
L
L
L
Op-Code
Refer to operations in Operative Command Table
H
L
H
×
×
×
Refer to operations in Operative Command Table
H
L
L
H
×
×
Refer to operations in Operative Command Table
H
L
L
L
H
×
Refer to operations in Operative Command Table
H
L
L
L
L
H
×
Self refresh
1
H
L
L
L
L
L
Op-Code
Refer to operations in Operative Command Table
L
×
×
×
×
×
×
Power down
1
Row active
H
×
×
×
×
×
×
Refer to operations in Operative Command Table
L
×
×
×
×
×
×
Power down
1
Any state other than
H
H
×
×
×
×
Refer to operations in Operative Command Table
listed above
H
L
×
×
×
×
×
Begin clock suspend next cycle
2
L
H
×
×
×
×
×
Exit clock suspend next cycle
L
L
×
×
×
×
×
Maintain clock suspend
Notes 1.
Self refresh can be entered only from the all banks idle state. Power down can be entered only from all
banks idle or row active state.
2.
Must be legal command as defined in Operative Command Table.
Remark
H = High level, L = Low level,
×
= High or Low level (Don't care)
相關(guān)PDF資料
PDF描述
UPD45128163G5-A80T-9JF 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD45128163G5-A75-9JF 制造商:Elpida Memory Inc 功能描述:8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
UPD45128841G5-A75-9JF 制造商:NEC Electronics Corporation 功能描述:SDRAM, 16M x 8, 54 Pin, Plastic, TSOP
UPD4516161AG5A109NF 制造商:NEC Electronics Corporation 功能描述:
UPD4516161AG5-A10-9NF 制造商:NEC Electronics Corporation 功能描述:SDRAM, 1M x 16, 50 Pin, Plastic, TSOP
UPD4528BC 制造商:Panasonic Industrial Company 功能描述:IC
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