參數(shù)資料
型號(hào)： UPD16879GS-BGG
廠商： NEC Corp.
英文描述： MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT
中文描述： 單片四H橋驅(qū)動(dòng)電路
文件頁(yè)數(shù)： 18/32頁(yè)
文件大?。?/td> 199K
代理商： UPD16879GS-BGG
Data Sheet S14188EJ1V0DS00
18
μ
PD16879
DATA CONFIGURATION
Input data is composed of the serial data on 8 bits
×
13 bytes. Input serial data with the LSB first, i.e., starting
from the D0 bit (LSB) of the first byte. Therefore, the D7 bit of the 13th byte is the most significant bit (MSB).
The establishment of the delay time to the output from the power supply injection, chopping frequency, output
current, number of pulse, pulse cycle, and so on are possible with this product.
The
μ
PD16879 has an EXT pin for monitoring the internal operations, the parameter to be monitored can be
selected by serial data.
The
μ
PD16879 built in power save function. If set power save mode, consumption current decreased to about
1/10.
Input serial data during first point wait time (FF1: high level).
This product uses separated external reference clock (f
CLK
). If they don’t input f
CLK
, this product can’t operate
normally.
The establishment value which shows it in this document is at the time of f
CLK
= 4.5 MHz. Please be careful
because establishment value is different in the case of one except for f
CLK
= 4.5 MHz.
Detail of Data Configuration
Ho to input serial data is below.
[1st byte]
The 1st byte specifies the delay between data being read and data being output. This delay is called the first
point wait time, and the motor can be driven from that point at which the first point wait time is “0”. This time is
counted at the rising edge of V
D
(or falling edge of V
D
). The first point wait time can be set to 58.03 ms (when a 4.5
MHz clock input) and can be fine-tuned by means of 8-bit division (227.6
μ
s step: with 4.5 MHz clock).
Always input data other than “0” to this byte because the first point wait time is necessary for latching data. If “0”
is input to this byte, data cannot be updated. Transfer serial data during the first point wait time.
Table 3. 1st Byte Data Configuration
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Data
First point wait
Data
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
00000000
Prohibition
MSB
LSB
00001001
About 2.05 ms
11111111
About 58.03 ms
n
N
×
1024/4.5 MHz
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